Hostname: page-component-cd9895bd7-jn8rn Total loading time: 0 Render date: 2024-12-28T02:21:18.582Z Has data issue: false hasContentIssue false

Enhanced performance of a 60-GHz power amplifier by using slow-wave transmission lines in 40 nm CMOS technology

Published online by Cambridge University Press:  11 October 2011

Xiao-Lan Tang*
Affiliation:
IMEP-LAHC, Université de Grenoble, Minatec, 3 Parvis Louis Néel, 38016 Grenoble Cedex 1, France. Phone: +33 04 56 52 95 48
Emmanuel Pistono
Affiliation:
IMEP-LAHC, Université de Grenoble, Minatec, 3 Parvis Louis Néel, 38016 Grenoble Cedex 1, France. Phone: +33 04 56 52 95 48
Philippe Ferrari
Affiliation:
IMEP-LAHC, Université de Grenoble, Minatec, 3 Parvis Louis Néel, 38016 Grenoble Cedex 1, France. Phone: +33 04 56 52 95 48
Jean-Michel Fournier
Affiliation:
IMEP-LAHC, Université de Grenoble, Minatec, 3 Parvis Louis Néel, 38016 Grenoble Cedex 1, France. Phone: +33 04 56 52 95 48
*
Corresponding author: X. Tang Email: tangx@minatec.inpg.fr

Abstract

This paper shows the contribution of slow-wave coplanar waveguides on the performance of power amplifiers operating at millimeter-wave frequencies in CMOS-integrated technologies. These transmission lines present a quality factor Q two to three times higher than that of the conventional microstrip lines at the same characteristic impedance. To demonstrate the contribution of the slow-wave transmission lines on integrated millimeter-wave amplifiers performance, two Class-A single-stage power amplifiers (PA) operating at 60 GHz were designed in standard 40 nm CMOS technology. One of the power amplifiers incorporates only the microstrip lines, whereas slow-wave coplanar transmission lines are considered in the other one. Both amplifiers are biased in Class-A operation, drawing, respectively, 22 and 23 mA from 1.2 V supply. Compared to the power amplifier using conventional microstrip transmission lines, the one implemented with slow-wave transmission lines shows improved performances in terms of gain (5.6 dB against 3.3 dB), 1 dB output compression point (OCP1dB: 7 dBm against 5 dBm), saturated output power (Psat: >10 and 8 dBm, respectively), power-added efficiency (PAE: 16% instead of 6%), and die area without pads (Sdie: 0.059 mm2 against 0.069 mm2).

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2011

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

[1]Doan, C.H.; Emami, S.; Niknejad, A.M.; Brodersen, R.W.: Millimeter-wave CMOS design. IEEE J. Solid-State Circuits, 40 (2005), 144155.CrossRefGoogle Scholar
[2]Chan, W.L.; Long, J.R.: A 58–65 GHz Neutralized CMOS Power Amplifier With PAE Above 10% at 1-V Supply. IEEE J. Solid-State Circuits, 45 (2010), 554564.CrossRefGoogle Scholar
[3]Hongmei, L. et al. : Technology scaling and device design for 350 GHz RF performance in a 45 nm bulk CMOS process, in IEEE Symp. VLSI Technology, 2007, 5657.Google Scholar
[4]Gogineni, U.; Alamo, J.A.; Putnam, C.: RF power potential of 45 nm CMOS technology, in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), California, USA, 2010.CrossRefGoogle Scholar
[5]Cheung, T.S.D.; Long, J.R.: Shielded passive devices for silicon-based monolithic microwave and millimeter-wave integrated circuits. IEEE J. Solid-State Circuits, 41 (2006), 11831200.CrossRefGoogle Scholar
[6]Kaddour, D. et al. : High-Q slow-wave coplanar transmission lines on 0.35 µm CMOS process. IEEE Microw. Wirel. Compon. Lett., 19 (2009), 542544.CrossRefGoogle Scholar
[7]Repossi, M.; Eyssa, W.; Vecchi, F.; Arcioni, P.; Svelto, F.: Design of low-loss transmission lines in scaled CMOS by accurate electromagnetic simulations. IEEE J. Solid-State Circuits, 44 (2009), 26052615.Google Scholar
[8]Hsiu-Ying, C.; Tzu-Jin, Y.; Liu, S.; Chung-Yu, W.: High-performance slow-wave transmission lines with optimized slot-type floating shields. IEEE Trans. Electron Dev., 56 (2009), 17051711.Google Scholar
[9]Franc, A.L. et al. : Slow-wave high performance shielded CPW transmission lines: A lossy model, in Microwave Conf. EuMC, Rome, Italy, 2009.CrossRefGoogle Scholar
[10]Yang, F.R.; Qian, Y.; Coccioli, R.; Itoh, T.: A novel low-loss slow-wave microstrip structure. IEEE Microw. Guid. Wave Lett., 8 (1998), 372374.CrossRefGoogle Scholar
[11]Sayag, A. et al. : A 25 GHz 3.3 dB NF low noise amplifier based upon slow wave transmission lines and the 0.18 µm CMOS technology, in Radio Frequency Integrated Circuits Symp. (RFIC), Atlanta, USA, 2008.CrossRefGoogle Scholar
[12]Quemerais, T.; Moquillon, L.; Pruvost, S.; Fournier, J.M.; Benech, P.; Corrao, N.: A CMOS class-A 65 nm power amplifier for 60 GHz applications, in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), California, USA, 2010.CrossRefGoogle Scholar
[13]Munkyo, S.; Jagannathan, B.; Pekarik, J.; Rodwell, M.J.W.: A 150 GHz amplifier with 8 dB gain and +6 dBm Psat in digital 65 nm CMOS using dummy-prefilled microstrip lines. IEEE J. Solid-State Circuits, 44 (2009), 34103421.Google Scholar
[14]Dawn, D. et al. : 60 GHz CMOS power amplifier with 20-dB-gain and 12dBm Psat, in IEEE MTT-S International Microwave Symposium Digest, MTT '09, Boston, USA, 2009.CrossRefGoogle Scholar
[15]Jing-Lin, K.; Zuo-Min, T.; Kun-You, L.; Huei, W.; A 50 to 70 GHz power amplifier using 90 nm CMOS technology. IEEE Microw. Wirel. Compon. Lett., 19 (2009), 4547.CrossRefGoogle Scholar
[16]Suzuki, T.; Kawano, Y.; Sato, M.; Hirose, T.; Joshin, K.: 60 and 77 GHz power amplifiers in Standard 90 nm CMOS, in Solid-State Circuits Conf. (ISSCC), IEEE International Digest of Technical Papers, San Francisco, USA, 2008.CrossRefGoogle Scholar
[17]Kurita, N.; Kondoh, H.: 60 GHz and 80 GHz wide band power amplifier MMICs in 90 nm CMOS technology, in Radio Frequency Integrated Circuits Symp., Boston, USA, 2009.CrossRefGoogle Scholar
[18]Law, C.Y.; Pham, A.V.: A high-gain 60 GHz power amplifier with 20dBm output power in 90 nm CMOS, in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Francisco, USA, 2010.CrossRefGoogle Scholar
[19]Quemerais, T.; Moquillon, L.; Fournier, J.M.; Benech, P.; Corrao, N.: TFMS Microstrip line modelling and characterization up to 110 GHz on 45 nm node silicon technology: application for CAD, in Silicon Monolithic Integrated Circuits in RF Systems (SiRF), California, USA, 2010.CrossRefGoogle Scholar
[20]Quemerais, T.; Moquillon, L.; Fournier, J.M.; Benech, P.; Corrao, N.: Methodology of design of millimeter wave power amplifiers complying with 125°C electromigration design rules in advanced CMOS technology, in Wireless and Microwave Technology Conf. (WAMICON), Florida, USA, 2010.CrossRefGoogle Scholar
[21]Siligaris, A.; Mounet, C.; Reig, B.; Vincent, P.: CPW and discontinuities modeling for circuit design up to 110 GHz in SOI CMOS technology, in Radio Frequency Integrated Circuits (RFIC) Symp., Honolulu Hawaii, USA, 2007.CrossRefGoogle Scholar
[22]Ferrari, P.; Flechet, B.; Angenieux, G.: Time domain characterization of lossy arbitrary characteristic impedance transmission lines. IEEE Microw. Guid. Wave Lett., 4 (1994), 177179.CrossRefGoogle Scholar
[23]Mangan, A.M.; Voinigescu, S.P.; Ming-Ta, Y.; Tazlauanu, M.: De-embedding transmission line measurements for accurate modeling of IC designs. IEEE Trans. Electron Dev., 53 (2006), 235241.CrossRefGoogle Scholar
[24]Quemerais, T.: Design and study of the reliability of millimeter-wave power amplifiers in advanced CMOS technologies (Ph.D. thesis, 2003, Grenoble-INP France).Google Scholar
[25]Chalvatzis, T.; Yau, K.H.K.; Aroca, R.A.; Schvan, P.; Ming-Ta, Y.; Voinigescu, S.P.: Low-voltage topologies for 40-Gb/s circuits in nanoscale CMOS. IEEE J. Solid-State Circuits, 42 (2007), 15641573.CrossRefGoogle Scholar
[26]Dickson, T.O. et al. : The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design Porting of Si(Ge) (Bi)CMOS high-speed building blocks. IEEE J. Solid-State Circuits, 41 (2006), 18301845.CrossRefGoogle Scholar
[27]Boots, H.M.J.; Doornbos, G.; Heringa, A.: Scaling of characteristic frequencies in RF CMOS. IEEE Trans. Electron Dev., 51 (2004), 21022108.CrossRefGoogle Scholar