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On-chip tensile testing of nanoscale silicon free-standing beams

Published online by Cambridge University Press:  04 November 2011

Umesh Bhaskar ,
Vikram Passi ,
Samer Houri ,
Enrique Escobedo-Cousin ,
Sarah H. Olsen ,
Thomas Pardoen  and
Jean-Pierre Raskin
Umesh Bhaskar*
Affiliation:
Research Center in Micro and Nanoscopic Materials and Electronic Devices, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium; and Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium
Vikram Passi
Affiliation:
Research Center in Micro and Nanoscopic Materials and Electronic Devices, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium; and Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium
Samer Houri
Affiliation:
Research Center in Micro and Nanoscopic Materials and Electronic Devices, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium; and Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium
Enrique Escobedo-Cousin
Affiliation:
Newcastle University, School of Electrical, Electronic & Computer Engineering, NE1 7RU, Newcastle upon Tyne, United Kingdom
Sarah H. Olsen
Affiliation:
Newcastle University, School of Electrical, Electronic & Computer Engineering, NE1 7RU, Newcastle upon Tyne, United Kingdom
Thomas Pardoen
Affiliation:
Institute of Mechanics, Materials and Civil Engineering, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium; and Research Center in Micro and Nanoscopic Materials and Electronic Devices, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium
Jean-Pierre Raskin
Affiliation:
Research Center in Micro and Nanoscopic Materials and Electronic Devices, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium; and Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Université Catholique de Louvain, B-1348 Louvain-la-Neuve, Belgium
*
a)Address all correspondence to this author. e-mail: umesh.bhaskar@uclouvain.be
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Abstract

Nanomechanical testing of silicon is primarily motivated toward characterizing scale effects on the mechanical behavior. “Defect-free” nanoscale silicon additionally offers a road to large deformation permitting the investigation of transport characteristics and surface instabilities of a significantly perturbed atomic arrangement. The need for developing simple and generic characterization tools to deform free-standing silicon beams down to the nanometer scale, sufficiently equipped to investigate both the mechanical properties and the carrier transport under large strains, has been met in this research through the design of a versatile lab-on-chip. The original on-chip characterization technique has been applied to monocrystalline Si beams produced from Silicon-on-Insulator wafers. The Young’s modulus was observed to decrease from 160 GPa down to 108 GPa when varying the thickness from 200 down to 50 nm. The fracture strain increases when decreasing the volume of the test specimen to reach 5% in the smallest samples. Additionally, atomic force microscope-based characterizations reveal that the surface roughness decreases by a factor of 5 when deforming by 2% the Si specimen. Proof of concept transport measurements were also performed under deformation up till 3.5% on 40-nm-thick lightly p-doped silicon beams.

Keywords

SiMicroelectromechanicalNanoscale
Type
Articles
Information
Journal of Materials Research , Volume 27 , Issue 3: Focus Issue: Advances in Mechanics of One-Dimensional Micro/Nanomaterials , 14 February 2012 , pp. 571 - 579
Copyright
Copyright © Materials Research Society 2011

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