Hostname: page-component-cd9895bd7-gbm5v Total loading time: 0 Render date: 2024-12-28T02:18:24.605Z Has data issue: false hasContentIssue false

Sample Preparation for Precise and Quantitative Electron Holographic Analysis of Semiconductor Devices

Published online by Cambridge University Press:  14 July 2006

Myung-Geun Han
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA
Jing Li
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA
Qianghua Xie
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Tempe, AZ 85284, USA
Peter Fejes
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Tempe, AZ 85284, USA
James Conner
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Austin, TX 78721, USA
Bill Taylor
Affiliation:
Physical Analysis Laboratory, Advanced Products Research and Development Laboratory, Freescale Semiconductor Inc., Austin, TX 78721, USA
Martha R. McCartney
Affiliation:
Center for Solid State Science, Arizona State University, Tempe, AZ 85287-1704, USA Department of Physics and Astronomy, Arizona State University, Tempe, AZ 85287-1504, USA
Get access

Abstract

Wedge polishing was used to prepare one-dimensional Si n-p junction and Si p-channel metal-oxide-silicon field effect transistor (pMOSFET) samples for precise and quantitative electrostatic potential analysis using off-axis electron holography. To avoid artifacts associated with ion milling, cloth polishing with 0.02-μm colloidal silica suspension was used for final thinning. Uniform thickness and no significant charging were observed by electron holography analysis for samples prepared entirely by this method. The effect of sample thickness was investigated and the minimum thickness for reliable results was found to be ∼160 nm. Below this thickness, measured phase changes were smaller than expected. For the pMOSFET sample, quantitative analysis of two-dimensional electrostatic potential distribution showed that the metallurgical gate length (separation between two extension junctions) was ∼54 nm, whereas the actual gate length was measured to be ∼70 nm by conventional transmission electron microscopy. Thus, source and drain junction encroachment under the gate was 16 nm.

Type
MATERIALS APPLICATIONS
Copyright
© 2006 Microscopy Society of America

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

Duhayon, N., Eyben, P., Fouchier, M., Clarysse, T., Vandervorst, W., Alvarez, D., Schoemann, S., Ciappa, M., Stangoni, M., Fichtner, W., Formanek, P., Kittler, M., Raineri, V., Giannazzo, F., Goghero, D., Rosenwaks, Y., Shikler, R., Saraf, S., Sadewasser, S., Barreau, N., Glatzel, T., Verheijen, M., Mentink, S.A.M., Von Sprekelsen, M., Maltezopoulos, T., Wiesendanger, R., & Hellemans, L. (2004). Assessing the performance of two-dimensional dopant profiling techniques. J Vac Sci Technol B 22, 385393.CrossRefGoogle Scholar
Gajdardziska-Josifovska, M., McCartney, M.R., De Ruijter, W.J., Smith, D.J., Weiss, J.K., & Zuo, J.M. (1993). Accurate measurements of mean inner potential of crystal wedges using digital electron holograms. Ultramicroscopy 50, 285299.CrossRefGoogle Scholar
Gribelyuk, M.A., McCartney, M.R., Li, J., Murthy, C.S., Ronsheim, P., Doris, B., McMurray, J.S., Hegde, S., & Smith, D.J. (2002). Mapping of electrostatic potential in deep submicron CMOS devices by electron holography. Phys Rev Lett 89, 025502.CrossRefGoogle Scholar
Liechty, G.D., Hirsch, E., & Smith, C.A. (2003). TEM wedge preparation of an IC: MultiPrep™ Procedure Documents. Rancho Dominguez, CA: Allied High Tech Products Inc.Google Scholar
McCartney, M.R. & Gajdardziska-Josifovska, M. (1994). Absolute measurement of normalized thickness, ti, from off-axis electron holography. Ultramicroscopy 53, 283289.CrossRefGoogle Scholar
McCartney, M.R., Smith, D.J., Farrow, R.F.C., & Makus, R.F. (1997). Off-axis electron holography of epitaxial Fe-Pt films. J Appl Phys 82, 24612465.CrossRefGoogle Scholar
Rau, W.D., Schwander, P., Baumann, F.H., Hoppner, W., & Ourmazd, A. (1999). Two-dimensional mapping of the electrostatic potential in transistors by electron holography. Phys Rev Lett 82, 26142617.CrossRefGoogle Scholar
Semiconductor Industry Association. (2003). International Technology Roadmap for Semiconductors. Available at: http://public.itrs.net/Files/2001ITRS/.Google Scholar
Singisetti, U., McCartney, M.R., Li, J., Chakraborty, P.S., Goodnick, S.M., Kozicki, M.N., & Thornton, T.J. (2003). Two-dimensional electrical characterization of ultrashallow source/drain extensions for nanoscale MOSFETs. Superlattices and Microstructures 34, 301310.CrossRefGoogle Scholar
Snider, G. (2001). 1D Poisson. Available at: http://www.nd.edu/∼gsnider/.Google Scholar
Somodi, P.K., Dunin-Borkowski, R.E., Twitchett, A.C., Barnes, C.H.W., & Midgley, P.A. (2003). Simulations of the electrostatic potential distribution in a TEM sample of a semiconductor device. Inst Phys Conf Ser 180, 501504.Google Scholar
Twitchett, A.C., Dunin-Borkowski, R.E., Broom, R.F., & Midgley, P.A. (2004). Quantitative electron holography of biased semiconductor devices. J Phys Condens Matter 16, S181S192.CrossRefGoogle Scholar
Twitchett, A.C., Dunin-Borkowski, R.E., & Midgley, P.A. (2002). Quantitative electron holography of biased semiconductor devices. Phys Rev Lett 88, 238302.CrossRefGoogle Scholar
Wang, Z.-G., Kato, N., Sasaki, K., Hirayama, T., & Saka, H. (2004). Electron holographic mapping of two-dimensional doping areas in cross-sectional device specimens prepared by the lift-out technique based on a focused ion beam. J Electron Microsc 53, 115119.CrossRefGoogle Scholar