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The Two-Step Growth Mechanism of MOCVD GaAs/Si

Published online by Cambridge University Press:  28 February 2011

Koichi Ishida
Koichi Ishida*
Affiliation:
Optoelectronics Joint Research Laboratory1333 Kamnikodanaka, Nakahara-ku, Kawasaki 211, Japan
*
*Present address:NEC Fundamental Research Laboratories4–1–1, Miyazaki, Miyamae-ku, Kawasaki, Kanagawa 213, Japan
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Abstract

The growth mechanism and lattice defects are studied for GaAs/Si grown by the two-step MOCVD growth procedure using transmission electron microscopy (TEM). The large misfit stress between GaAs and Si is relieved by misfit dislocations at the GaAs/Si interface, which are introduced during epitaxial regrowth of the thin (<200A) polycrystalline buffer layer grown at 400∼450°C. The regrown buffer layer is relaxed to a nearly stress free state, and therefore a thick GaAs layer can subsequently be grown at the higher growth temperature (∼750°C). The tensile stress in GaAs at room temperature is shown to be a direct consequence of the misfit stress relaxation at the higher growth temperature. TEM revealed high density (<106cm−2) of the threading dislocations in the GaAs layer, contrary to the results of molten KOH etching.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 91: Symposium A – Heteroepitaxy on Silicon II , 1987 , 133
Copyright
Copyright © Materials Research Society 1987

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