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Ultra low κ PECVD Porogen Approach: Matrix Precursors Comparison and Porogen Removal Treatment Study

Published online by Cambridge University Press:  01 February 2011

L. Favennec
Affiliation:
STMicroelectronics — 850, rue Jean Monnet 38920 CROLLES — France
V. Jousseaume
Affiliation:
CEA-DRT-LETI — CEA/GRE — 17, rue des Martyrs 38054 GRENOBLE Cedex 9 — France
V. Rouessac
Affiliation:
Institut Europeen des Membranes / UM 2-CC047 — Place Eugene Bataillon 34095 MONTPELLIER Cedex 5, France
J. Durand
Affiliation:
Institut Europeen des Membranes / UM 2-CC047 — Place Eugene Bataillon 34095 MONTPELLIER Cedex 5, France
G. Passemard
Affiliation:
STMicroelectronics — 850, rue Jean Monnet 38920 CROLLES — France
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Abstract

The introduction of new dielectrics into silicon chip interconnection technology is necessary to increase electrical performance. Sub-65nm technologies need κ values below 2.5 and the main way to reduce the dielectric constant is to introduce porosity. This work reports results concerning a two steps PECVD porogen approach to perform Ultra Low κ (κ <2.5). The first step is an hybrid material deposition: i.e. an a-SiOC:H matrix containing organic sacrificial inclusions (porogen phase). In the second step, the porogen is removed by a suitable curing to generate porosity. Two siloxane precursors (decamethylcyclopentasiloxane and diethoxymethylsilane) were evaluated as matrix precursors. Their influences, as well as O2 addition in plasma gas feed, in terms of cross-linking and incorporation were evaluated by FTIR analysis. Thermal anneal and UV treatment (thermally assisted) were evaluated as a curing second step. It allows to better understand this critical step which combines porogen removal and material cross-linking. By optimizing deposition and curing parameters, κ value lower than 2.4 were obtained.

Type
Research Article
Copyright
Copyright © Materials Research Society 2005

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References

1. Roberts, B., Harrus, A., and Jackson, R.L., Sol. Stat. Techno., 38 (1995) 69.Google Scholar
2. Wu, Z. C., Shiung, Z. W., Chiang, C. C., Wu, W. H., Chen, M. C., Jeng, S. M., Yu, H., and Liang, M. S., Chang, W., Chou, P. F., Jang, S. M., J. Electroch. Soc., 148 (2001) F115.Google Scholar
3. Gonon, P., Sylvestre, A., Meynen, H., and Cotthem, L. Van, J. Electro. Soc., 150 (2003) F47.Google Scholar
4. International Technology Roadmap for Semiconductors 2003.Google Scholar
5. Grill, A., and Patel, V., Mat. Techno. Adv. Int., Symp. Mat. Research Soc. (2001) 1.Google Scholar
6. Maex, K., Baklanov, M. R., Shamiryan, D., lacopi, F., Brongersma, S. H., and Ya, Z. S. (2003) 8793.Google Scholar
7. Favennec, L., Jousseaume, V., Rouessac, V., Fusalba, F., Durand, J. and Passemard, G., Mat. Sci. Sem Processing, 7 (2004) 277.Google Scholar
8. Rau, C., and Kulisch, W., Thin Solid Films, 249 (1994) 28.Google Scholar
9. Grill, A., and Neumayer, D.A., J. Appl. Phys., 94 (2003) 6697 Google Scholar