Published online by Cambridge University Press: 21 February 2011
<Directly-bonded wafers were characterized using capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements. We also studied silicon on insulator (SOI) wafers with different interfacial oxide thicknesses. In the active layers of the directly bonded wafer, two dominant electron traps (Ec-0.16eV, Ec-0.24eV) were observed at 23 μμμμm from the bonded interface. Both trap densities are almost constant (about 2 × 1011cm−3) at distances larger than about 10 μm. In the substrate, the density of the shallower electron trap increases (about 8 × 1011 cm−3) within about 20 μm from the interface, while the other trap concentration is almost constant and nearly equal to that in the active layers. No trap was observed near the wafer backside. These traps were also observed in the bonded SO1 wafers. Both the trap concentrations depend on the thickness of the bonded interfacial oxide. The shallower trap concentration increases with increasing oxide thickness, and the deeper one decreases.