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How to eliminate non-positive circuits in periodic scheduling:a proactive strategy based on shortest path equations

Published online by Cambridge University Press:  04 July 2013

Sid-Ahmed-Ali Touati ,
Sébastien Briais  and
Karine Deschinkel
Sid-Ahmed-Ali Touati
Affiliation:
Universitéde Nice Sophia-Antipolis, France.. Sid.Touati@unice.fr; Sid.Touati@inria.fr
Sébastien Briais
Affiliation:
Université de Versailles Saint-Quentin-en-Yvelines, France
Karine Deschinkel
Affiliation:
Université de Franche-Comté, France
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Abstract

Usual periodic scheduling problems deal with precedence constraints having non-negativelatencies. This seems a natural way for modelling scheduling problems, since task delaysare generally non-negative quantities. However, in some cases, we need to consider edgeslatencies that do not only model task latencies, but model other precedence constraints.For instance in register optimisation problems devoted to optimising compilation, ageneric machine or processor model can allow considering access delays into/fromregisters. Edge latencies may be then non-positive leading to a difficult schedulingproblem in presence of resources constraints. This research result is related to theproblem of periodic scheduling with storage requirement optimisation; its aims is to solvethe practical problem of register optimisation in optimising compilation. We show thatpre-conditioning a data dependence graph (DDG) to satisfy register constraints beforeperiodic scheduling under resources constraints may create circuits with non-positivedistances, resulted from the acceptance of non-positive edge latencies. As a compilerconstruction strategy, it is forbidden to allow the creation of circuits with non-positivedistances during the compilation flow, because such DDG circuits do not guarantee theexistence of a valid instruction schedule under resource constraints. We study twosolutions to avoid the creation of these problematic circuits. A first solution isreactive, it tolerates the creation of non-positive circuit in a first step, and ifdetected in a further check step, makes a backtrack to eliminate them. A second solutionis proactive, it prevents the creation of non-positive circuits in the DDG during theregister optimisation process. It is based on shortest path equations which define anecessary and sufficient condition to free any DDG from these problematic circuits. Thenwe deduce a linear program accordingly. We have implemented our solutions and we presentsuccessful experimental results.

Keywords

Periodic schedulinglinear programmingstorage constraintsregister constraintscode optimisation
Type
Research Article
Information
RAIRO - Operations Research , Volume 47 , Issue 3 , July 2013 , pp. 223 - 249
Copyright
© EDP Sciences, ROADEF, SMAI, 2013

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