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Elimination of slip lines in capless rapid thermal annealing of GaAs

Published online by Cambridge University Press:  31 January 2011

Michael J. Goff
Affiliation:
GE Company, Electronics Laboratory, Electronics Parkway, Syracuse, New York 13221
Sujane C. Wang
Affiliation:
GE Company, Electronics Laboratory, Electronics Parkway, Syracuse, New York 13221
Tan-Hua Yu
Affiliation:
GE Company, Electronics Laboratory, Electronics Parkway, Syracuse, New York 13221
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Abstract

A new rapid thermal annealing (RTA) procedure has been developed that eliminates the problem of crystallographic slip in 2 in, ion-implanted GaAs wafers. This annealing arrangement is easy to implement and is reliable. A precision machined graphite support structure and guard ring are used to insure uniform cooling across the entire wafer, thus eliminating slip line production. Characteristics of silicon ion implants have been determined using van der Pauw Hall, Polaron C–V profiling, and eddy current resistivity measurements. Characterization showed excellent dopant activation and uniformity can be achieved using this new technique. Low-temperature photoluminescence measurements were performed on samples annealed with and without graphite in the system, and no detectable difference in surface carbon contamination was found.

Type
Articles
Copyright
Copyright © Materials Research Society 1988

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References

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