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The Future of CMP

Published online by Cambridge University Press:  31 January 2011

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Abstract

Chemical–mechanical polishing, or planarization (CMP), is one of several advanced microfabrication processes that provide complementary capabilities for constructing advanced electronic devices. At the current state of the art, CMP demonstrates significant advantages due to its high degree of process flexibility, particularly in the chemical formulation of polishing solutions and slurries. This article explores some possible future applications of CMP using new advanced materials other than silicon, silicon oxide, and silicon nitride. Such materials may include refractory and noble metals, high-κ insulators, and mixed metal oxide perovskites. Although no one can predict future applications with absolute certainty, it seems safe to conclude that CMP will remain a key microfabrication technology for the foreseeable future.

Type
Research Article
Copyright
Copyright © Materials Research Society 2002

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References

1.Patrick, W., Guthrie, W., Standley, C., and Schiable, P., J. Electrochem. Soc. 138 (6) (1991) p. 1778.Google Scholar
2.Kaufman, F.B., Thompson, D.B., Broadie, R.E., Jaso, M.A., Guthrie, W.L., Pearson, D.J., and Small, M.B., J. Electrochem. Soc. 138 (11) (1991) p. 3460.CrossRefGoogle Scholar
3.White, F., Hill, W., Eslinger, S., Payne, E., Cote, W., Chen, B., and Johnson, K., in IEDM Tech. Dig. (Institute of Electrical and Electronics Engineers, Piscataway, NJ, 1992) p. 301.Google Scholar
4.Givens, J., Geissler, S., Cain, O., Clark, W., Koburger, C., and Lee, J., in Proc. VLSI Multilevel Interconnect Conf. (VMIC) XI (1994) p. 43.Google Scholar
5.Luther, B., White, J.F., Uzoh, C., Cacouris, T., Hummel, J., Guthrie, W., Lustig, N., Greco, S., Greco, N., Zuhoski, S., Agnello, P., Colgan, E., Mathad, S., Saraf, L., Weitzman, E.J., Hu, C.K., Kaufman, F., Jaso, M., Buchwalter, L.P., Reynolds, S., Smart, C., Edelstein, D., Baran, E., Cohen, S., Knoedler, C.M., Malinowski, J., Horkans, J., Deligianni, H., Harper, J., Andricacos, P.C., Paraszczak, J., Pearson, D.J., and Small, M., in Proc. VSLI Multilevel Interconnect Conf. (VMIC) X (1993) p. 15.Google Scholar
6.Lee, W., Yang, H., and Lee, J., in Copper Interconnects, New Contact Metallurgies and Low-κ Interlevel Dielectrics, PV-2000–27, edited by Mathad, G.S. and Rathore, H.S. (The Electrochemical Society, Pennington, NJ, 2001) p. 63.Google Scholar
7. For example, see Wolf, S. and Tauber, R.N., Silicon Processing for the VLSI Era, Vols. 1–3 (Lattice Press, Sunset Beach, CA, 19902000).Google Scholar
8.International Technology Roadmap for Semiconductor 2001 Edition, ITRS Home Page, http://public.itrs.net/Files/2001ITRS/Home.htm (accessed July 2002).Google Scholar
9.Ma, Y., Evans, D.R., Nguyen, T., Ono, Y., and Hsu, S.T., IEEE Electron Device Lett. 20 (5) (1999) p. 254.Google Scholar
10.Li, T.K., Hsu, S.T., Ulrich, B.D., Stecker, L., Evans, D.R., and Lee, J.J., IEEE Electron Device Lett. 23 (6) (2002) p. 339.Google Scholar
11.Evans, D.R., U.S. Patent No. 6,290,736 (2001).Google Scholar
12.Liu, S.Q., Wu, N.J., and Ignatiev, A., Appl. Phys. Lett. 76 (2000) p. 2749.Google Scholar
13.Currie, M.T., Samavedam, S.B., Langdo, T.A., Leitz, C.W., and Fitzgerald, E.A., Appl. Phys. Lett. 72 (1998) p. 1718.Google Scholar
14.Evans, D.R., “CMP for Advanced Front-End Processing,” presented at 2000 Clarkson University International CMP Symp., Lake Placid, NY, August 13–17, 2000.Google Scholar
15.Evans, D.R., Oliver, M.R., and Kulus, M., in Chemical Mechanical Planarization IV, PV-2000–26, edited by Opila, R.L., Reidsema-Simpson, C., Sundaram, K.B., and Seal, S. (The Electrochemical Society, Pennington, NJ, 2001) p. 122.Google Scholar
16.Kondo, S., Sakuma, N., Homma, Y., Goto, Y., Ohashi, N., Yamaguchi, H., and Owada, N., in Proc. IEEE Int. Interconnect Technology Conf. (IITC) III (Institute of Electrical and Electronics Engineers, Piscataway, NJ, 2000) p. 253.Google Scholar
17.Yamaguchi, H., Ohashi, N., Imai, T., Torii, K., Noguchi, J., Fujiwara, T., Saito, T., Owada, N., Homma, Y., Kondo, S., and Hinode, K., in Proc. IEEE Int. Interconnect Technology Conf. (IITC) III (Institute of Electrical and Electronics Engineers, Piscataway, NJ, 2000) p. 264.Google Scholar