Molecular Memories Based on a CMOS Platform

Abstract

Hybrid complementary metal oxide semiconductor (CMOS)/molecular memory devices are based on a dynamic random-access memory (DRAM) architecture, are fast, have high density, and exhibit low power consumption. These devices use a well-characterized charge storage mechanism to store information based on the intrinsic properties of molecules attached to a CMOS platform. The molecules are designed in a rational way to have known electrical properties and can be incorporated into CMOS devices with only minor modification of existing fabrication methods. Each memory element contains a monolayer of molecules (typically 100,000–1,000,000) to store charge; this process yields a structure that has many times the charge density of a typical DRAM capacitor, obviating the necessity for a trench or stacked capacitor geometry. The magnitude of voltage required to remove each electron is quantized (typically a few hundred millivolts per state), making it much easier to put molecules in a known state and to detect that state with low-power operation. Existing devices have charge retention times that are >1000 times that of semiconductors, and nonvolatile strategies based on simple modifications of existing systems are possible. All of these devices are ultimately scalable to molecular dimensions and will enable the production of memory products as small as state-of-the-art lithography will allow.