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A Patterned Soi by Masked Anneal for System-on-Chip Applications

Published online by Cambridge University Press:  15 March 2011

G. M. Cohen  and
D. K. Sadana
G. M. Cohen
Affiliation:
IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598, U.S.A
D. K. Sadana
Affiliation:
IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598, U.S.A
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Abstract

We present a method for fabricating pattern silicon-on-insulator (SOI) wafers that exploit internal thermal oxidation (ITOX) to control the BOX formation. We demonstrated the process by fabricating a pattern SOI having two different buried oxides (BOX) thickness. We also show that by using a very low oxygen dose the BOX can be quenched in the masked regions, while maintaining a continuous BOX in unmasked regions. Very low damage forms at the transition region from thick to thin BOX. Due to the oxygen diffusion the smallest patterned box feature we could obtain was limited to > 0.5 micron.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 686: Symposium A – Materials Issues in Novel Si-Based Technology , 2001 , A2.4
Copyright
Copyright © Materials Research Society 2002

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References

References:

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