Published online by Cambridge University Press: 15 February 2011
All microelectronic chip interconnects are composed of polycrystalline films with properties that vary discretely with grain orientation. Techniques for dealing with this variation are developing as diminishing dimensions accentuate the effects of grain orientation. Variations in metallization microstructure affect mass transport and median failure time for metallization wearout mechanisms. Stability of adhesion layers, barrier layers and redundant conduction layers is influenced by the microstructure of the films in contact with each other. Intermetallic reactions, which are of no concern with single-level metallization, can become significant for multi level metallizations. Ti/AI systems provide typical examples of these trends.