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Ultrathin Si3N4 Films Deposited From Dichlorosilane For Gate Dielectrics Using Single-Wafer Hot-Wall Rapid Thermal CVD

Published online by Cambridge University Press:  01 February 2011

Yoshihide Senzaki ,
Yakov Brichko ,
Carl Barelli ,
Robert Herring ,
Dana Teasdale ,
Marci Schaefer  and
Joseph Sisson
Yoshihide Senzaki
Affiliation:
(Yoshi.Senzaki@asml.com)
Yakov Brichko
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
Carl Barelli
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
Robert Herring
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
Dana Teasdale
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
Marci Schaefer
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
Joseph Sisson
Affiliation:
ASML Thermal Division, 440 Kings Village Rd., Scotts Valley, CA 95066, USA
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Abstract

Using a hot-wall rapid thermal system which permits single-wafer processing, thin gate dielectrics consisting of silicon nitride films were fabricated by low pressure chemical vapor deposition (LPCVD). Nitride layers deposited from dichlorosilane (DCS) and ammonia exhibited greatly reduced electrical leakage current compared to silane-based nitride films which are conventionally used in lamp-based single-wafer rapid thermal technology. After a postdeposition anneal, the DCS-based gate dielectric films showed better diffusion barrier properties against boron penetration than silane-based gate dielectrics at a dopant activation temperature of 1000°C.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 716: Symposium B – Silicon Materials-Processing, Characterization, and Reliability , 2002 , B2.10
Copyright
Copyright © Materials Research Society 2002

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References

1. Roy, P. K. and Kizilyalli, I. C., Appl. Phys. Lett., 72, 2835 (1998).Google Scholar
2. Kim, B. Y., Luan, H. F., and Kwong, D. L., IEDM Tech. Dig. 97–463 (1997).Google Scholar
3. Wilk, G. D., Wallace, R. M., Anthony, J. M., J. Appl. Phys., 89, 5243 (2001).Google Scholar
4. Wolf, S. and Tauber, R. N., Silicon Processing For The VLSI Era, vol.1, 2nd ed. (Lattice Press, Sunset Beach, 2000), p.202.Google Scholar
5. Johnson, F. S., Miller, R. M., Öztürk, M. C., and Wortman, J. J., Mat. Res. Soc. Symp. Proc., 146, 345 (1989).Google Scholar
6. Senzaki, Y., Schaefer, M., Sisson, J., Barelli, C., Bailey, J., Herring, R., and Hayn, R., Electrochem. Solid-State Letters 5, F11 (2002).Google Scholar
7. Teasdale, D., Senzaki, Y., Herring, R., Hoeye, G., Page, L., and Schubert, P., Electrochem. Solid-State Letters 4, F11 (2001).Google Scholar
8. Senzaki, Y., Sisson, J., Herring, R., Yao, J., Teasdale, D., Ricketts, J., Dostal, D., and Barelli, C., Electrochem. Soc. Symp. Proc. 2001-9, 61 (2001).Google Scholar
9. Song, S. C., Luan, H. F., Chen, Y. Y., Gardner, M., Fulford, J., Allen, M., and Kwong, D. L., IEDM Tech. Dig. 98–373 (1998).Google Scholar
10. Pfiester, J. R., Baker, F. K., Mele, T. C., Tseng, H.-H., Tobin, P. J., Hayden, J. D., Miller, J. W., Gunderson, C. D., and Parrillo, L. C., IEEE Trans. Electr. Device 37, 1842 (1990).Google Scholar