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Device Simulation and Design Optimization for Diamond Based Insulated-gate Bipolar Transistors

Published online by Cambridge University Press:  01 February 2011

Haitao Ye
Affiliation:
University College London, University College London, London Centre for Nanotechnology, 17-19 Gordon Street, London, N/A, United Kingdom
Niall Tumilty
Affiliation:
n.tumilty@ee.ucl.ac.uk, University College London, London Centre for Nanotechnology, 17-19 Gordon Street, London, WC1H 0AH, United Kingdom
David Garner
Affiliation:
dmg@camsemi.com, Cambridge Semiconductors, St. Andrew's House, St. Andrew's Road, Cambridge, CB4 1DL, United Kingdom
Richard B. Jackman
Affiliation:
r.jackman@ucl.ac.uk, University College London, London Centre for Nanotechnology, 17-19 Gordon Street, London, WC1H 0AH, United Kingdom
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Abstract

A diamond based insulated gate bipolar transistor is incorporated into a two-dimensional device simulator (MEDICI) to examine the current gain (β) and potential distribution across the device. Initially, work has focused on an important component of IGBT structure, the PNP bipolar transistor, which has been simulated and is reported upon in this paper. Empirical parameters for emitter and collector regions were used. Various carrier concentrations for base region were used to optimize the simulation. It was found that decreasing the thickness of base region leads to an increase in current gain. A buffer layer is needed to prevent the punch-through at low carrier concentration in the base region. Various approaches of increasing the current gain are also discussed in this paper.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

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References

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