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Electroless Copper Deposition for Multilevel Metallization

Published online by Cambridge University Press:  25 February 2011

S.Simon Wong ,
James S. Cho ,
Ho K. Kang  and
C.H. Ting
S.Simon Wong
Affiliation:
Center for Integrated Systems, Stanford University, Stanford, CA 94305
James S. Cho
Affiliation:
Center for Integrated Systems, Stanford University, Stanford, CA 94305
Ho K. Kang
Affiliation:
Center for Integrated Systems, Stanford University, Stanford, CA 94305
C.H. Ting
Affiliation:
Intel Corporation, Santa Clara, CA 95052
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Abstract

Increases in cross-talk disturbance, signal delay and current density have a significant impact on the performance of integrated systems as the metal pitch continues to be scaled down. A metal, such as copper, which has high conductivity and high resistance to migration, will greatly alleviate these problems. A selective technique for the deposition of copper, such as electroless plating, is highly desirable because it circumvents the potential problem of dry etching copper and inherently planarizes the surface topography.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 203: Symposium D – Electronic Packaging Materials Science V , 1990 , 347
Copyright
Copyright © Materials Research Society 1991

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References

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