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Published online by Cambridge University Press: 07 June 2012
The typical architectures for single-transistor capacitorless dynamic random access memory (1T-DRAM) are reviewed. This memory takes advantage of floating-body effects in SOI-like devices. The principles of operation and the key mechanisms for memory programming and reading are described. Most of these devices can be enriched with non-volatile storage capability. Several possibilities for such ‘unified’ memory are explored.