Crossref Citations
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Crossref.
Breuil, L.
Lisoni, J.
Blomme, P.
Van den bosch, G.
and
Van Houdt, J.
2013.
A novel multilayer Inter-Gate Dielectric enabling up to 18V Program / Erase window for planar NAND flash.
p.
68.
Zahid, M. B.
Degraeve, R.
Breuil, L.
Van Den Bosch, G.
and
Van Houdt, J.
2013.
Instability study of high-κ Inter-Gate Dielectric stacks on hybrid floating gate flash memory.
p.
MY.6.1.
Breuil, Laurent
Lisoni, Judit G.
Blomme, Pieter
Van den Bosch, Geert
and
Van Houdt, Jan
2014.
${\rm HfO}_{2}$ Based High-$k$ Inter-Gate Dielectrics for Planar NAND Flash Memory.
IEEE Electron Device Letters,
Vol. 35,
Issue. 1,
p.
45.
Breuil, Laurent
Lisoni, Judit G.
Blomme, Pieter
Chi Lim Tan
Van den Bosch, Geert
and
Van Houdt, Jan
2015.
Intergate Dielectric Engineering Toward Large P/E Window Planar NAND Flash.
IEEE Transactions on Electron Devices,
Vol. 62,
Issue. 5,
p.
1484.
Lisoni, Judit G.
Breuil, Laurent
Blomme, Pieter
Meersschaut, Johan
Bergmaier, Andreas
Dollinger, Günther
Van den bosch, Geert
and
Van Houdt, Jan
2016.
Material selection for hybrid floating gate NAND memory applications.
physica status solidi (a),
Vol. 213,
Issue. 2,
p.
237.
Hamzah, Afiq
Alias, N. Ezaila
and
Ismail, Razali
2018.
Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering.
Japanese Journal of Applied Physics,
Vol. 57,
Issue. 6S3,
p.
06KC02.