Investigating the Interfacial Properties of Hf-based/Si and SiO₂/Si Gate Stacks

Abstract

As complementary metal–oxide–semiconductor (CMOS) devices are scaled down into nano-region, SiO₂ dielectric is approaching its physical and electrical limits. Hafnium based oxides are the most promising materials as a replacement for conventional gate dielectrics, due to its much higher dielectric constant (high-k) and stability. The aims of work were to investigate the interface-related issues associating with Hf-based/Si and SiO₂/Si gate stacks. The interfacial properties of dielectric oxide/Si were studied by stacking a different dielectric layer (SiO₂, HfSiO, and HfO₂) on Si substrate. We studied the electrical behavior of dielectric oxide/Si interface by leakage current density-voltage (J-V) and capacitance-voltage (C-V) measurement techniques. The effects of the post-deposition annealing (PDA) treatment on the interface charges of dielectric oxides were presented. We found that the PDA can effectively reduce trapping density and the leakage current, and eliminate hysteresis in the C–V curves. The X-ray photoelectron spectroscopy (XPS) was applied for studying the surface chemical bonding energy at different gate stack structures. The XPS analysis provides a better interpretation of the electrical property. As results, HfSiO films have exhibited a superior performance in terms of thermal stability and electrical characteristics.