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Junction Field Effect Transistors For High-Temperature Or High-Power Electronics

Published online by Cambridge University Press:  10 February 2011

J. C. Zolperw
J. C. Zolperw*
Affiliation:
Office of Naval Research, Arlington, VA 22217 previous address: Sandia National Laboratories, Albuquerque, NM 87185-0603
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Abstract

Junction field effect transistors (JFETs) are attractive for high-temperature or highpower operation since they rely on a buried semiconductor junction, and not a metal semiconductor interface as in a metal semiconductor (MESFET) or heterojunction field effect transistor (HFET), for modulating the transistor channel. This is important since a metal/semiconductor interface often degrades at elevated temperatures, either due to the ambient temperature or to Joule heating at high current levels, while a buried semiconductor junction can withstand higher temperatures. In fact, for proper design, the JFET becomes limited by thermal carrier generation in the semiconductor and not metallurgical degradation of the gate electrode.

In this talk an overview is given of JFET technology based on GaAs, SiC, and GaN. While impressive room temperature, high-frequency, results have been reported for GaAs JFET's with unit current gain cut-off frequencies up to 50 GHz, more work is needed to limit substrate conduction for optimum operation at 300 °C and above. For SiC JFETs, well behaved transistor operation has been maintained up to 600 °C, however, increased frequency performance is needed. More recently, a GaN JFET has also been demonstrated that is promising for similarly high temperature operation but is presently limited by buffer conduction. Future directions for each of these technologies, and potential extension to high power switching devices such as thyristors, will be presented at the conference.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 483: Symposium E – Power Semiconductor Materials & Devices , 1997 , 83
Copyright
Copyright © Materials Research Society 1998

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