Hostname: page-component-cd9895bd7-dzt6s Total loading time: 0 Render date: 2024-12-28T22:17:57.214Z Has data issue: false hasContentIssue false
  • English
  • Français

Lanthanum Oxide Capping Layer for Solution-Processed Ferroelectric-Gate Thin-Film Transistors

Published online by Cambridge University Press:  08 July 2011

Tue T. Phan ,
Trinh N. Q. Bui ,
Takaaki Miyasako ,
Thanh V. Pham ,
Eisuke Tokumitsu  and
Tatsuya Shimoda
Tue T. Phan
Affiliation:
School of Materials Science, Japan Advanced Institute of Science and Technology, 1-1 Asahidai, Nomi, Ishikawa 923-1292, Japan.
Trinh N. Q. Bui
Affiliation:
Japan Science and Technology Agency, ERATO, Shimoda Nano-Liquid Process Project, 2-5-3 Asahidai, Nomi, Ishikawa 923-1211, Japan.
Takaaki Miyasako
Affiliation:
Japan Science and Technology Agency, ERATO, Shimoda Nano-Liquid Process Project, 2-5-3 Asahidai, Nomi, Ishikawa 923-1211, Japan.
Thanh V. Pham
Affiliation:
School of Materials Science, Japan Advanced Institute of Science and Technology, 1-1 Asahidai, Nomi, Ishikawa 923-1292, Japan.
Eisuke Tokumitsu
Affiliation:
Japan Science and Technology Agency, ERATO, Shimoda Nano-Liquid Process Project, 2-5-3 Asahidai, Nomi, Ishikawa 923-1211, Japan. Precision and Intelligence Laboratory, Tokyo Institute of Technology, 4259-R2-19 Nagatsuta, Midori-ku, Yokohama 226-8503, Japan.
Tatsuya Shimoda
Affiliation:
School of Materials Science, Japan Advanced Institute of Science and Technology, 1-1 Asahidai, Nomi, Ishikawa 923-1292, Japan. Japan Science and Technology Agency, ERATO, Shimoda Nano-Liquid Process Project, 2-5-3 Asahidai, Nomi, Ishikawa 923-1211, Japan.
Get access

Abstract

We report on the use of La2O3 (LO) as a capping layer for ferroelectric-gate thin-film transistors (FGTs) with solution-processed indium-tin-oxide (ITO) channel and Pb(Zr,Ti)O3 (PZT) gate insulator. The fabricated FGT exhibited excellent performance with a high “ON/OFF” current ratio (ION/IOFF) and a large memory window (∆Vth) of about 108 and 3.5 V, respectively. Additionally, a significantly improved data retention time (more than 16 hours) as compared to the ITO/PZT structure was also obtained as a result of good interface properties between the ITO channel and LO/PZT stacked gate insulator. We suggest that the LO capping layer acts as a barrier to prevent the interdiffusion and provides atomically flat ITO/LO/PZT interface. This all-oxide FGT device is very promising for future ferroelectric memories.

Keywords

ferroelectricmemorysolution deposition
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1337: Symposium Q – New Functional Materials and Emerging Device Architectures for Nonvolatile Memories , 2011 , mrss11-1337-q02-05
Copyright
Copyright © Materials Research Society 2011

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Mathews, S., Ramesh, R., Venkatesan, T., Benedetto, J., Science 276, 238 (1997).Google Scholar
2. Prins, M. W. J., Zinnemers, S. E., Cillessen, J. F. M., and Giesbers, J. B., Appl. Phys. Lett. 70, 458 (1997).Google Scholar
3. Hirooka, G., Noda, M., and Okuyama, M., Jpn. J. Appl. Phys. 43, 2190 (2004).Google Scholar
4. Fukushima, T., Yoshimura, T., Masuko, K., Maeda, K., Ashida, A., and Fujimura, N., Jpn. J. Appl. Phys. 47, 8874 (2008).Google Scholar
5. Kato, Y., Kaneko, Y., Tanaka, H. and Shimada, Y., Jpn. J. Appl. Phys. 47, 2719(2008).Google Scholar
6. Miyasako, T., Senoo, M., and Tokumitsu, E., Appl. Phys. Lett. 86, 162902 (2005).Google Scholar
7. Tokumitsu, E., Senoo, M., and Miyasako, T., Microelectronic Engineering 80, 305 (2005).Google Scholar
8. Tue, P. T., Miyasako, T., Trinh, B. N. Q., Tokumitsu, E., and Shimoda, T., Ferroelectrics 405, 281 (2010).Google Scholar
9. Miyasako, T., Trinh, B. N. Q., Onoue, M., Kaneda, T., Tue, P. T., Tokumitsu, E., and Shimoda, T., Appl. Phys. Lett. 97, 173509 (2010).Google Scholar
10. Tokumitsu, E. and Oiwa, T., Mater. Res. Soc. Symp. Proc. 1250, G13–07 (2010).Google Scholar
11. Tue, P. T., Trinh, B. N. Q., Miyasako, T., Tokumitsu, E., and Shimoda, T., Microelectronics, 2010 IEEE International Conference on, pp.32–35, 19-22 Dec. 2010.Google Scholar
12. Sakai, S., Ilangovan, R., IEEE Electron Dev. Lett. 25, 369 (2004).Google Scholar
13. Hirooka, G., Noda, M., and Okuyama, M., Jpn. J. Appl. Phys. 43, 2190 (2004).Google Scholar
14. Wilk, G. D., Wallace, R. M., and Anthony, J. M., J. Appl. Phys. 89, 5243 (2001).Google Scholar
15. Juan, T. P. C., Lin, C. L., Shih, W. C., Yang, C. C., Lee, J. Y. M., Shye, D. C., and Lu, J. H., J. Appl. Phys. 105, 061625 (2009).Google Scholar
16. Kang, S. W. and Rhee, S. W., Journal of The Electrochemical Society 149 (6) C345–C348 (2002).Google Scholar
17. Rep, D. B. A. and Prins, M. W. J., J. Appl. Phys. 85, 7923 (1999).Google Scholar
18. Seager, C. H., McIntyre, D. C., Warren, W. L., and Tuttle, B. A., Appl. Phys. Lett. 68, 2660 (1996).Google Scholar
19. Kodama, K., Takahashi, M., Ricinschi, D., Lerescu, A. I., Noda, M. and Okuyama, M., Jpn. J. Appl. Phys. 41, 2639 (2002).Google Scholar
20. Ma, T. P. and Han, J. P., IEEE Electron Device Lett. 23, 386 (2002).Google Scholar