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A Polysilicon Tft Parameter Extractor

Published online by Cambridge University Press:  10 February 2011

O.K.B. Lui ,
S.W.B. Tam  and
P. Migliorato
O.K.B. Lui
Affiliation:
Cambridge UniversityEngineering Department, Trumpington Street, Cambridge CB2 1PZ, United Kingdom
S.W.B. Tam
Affiliation:
Cambridge UniversityEngineering Department, Trumpington Street, Cambridge CB2 1PZ, United Kingdom
P. Migliorato
Affiliation:
Cambridge UniversityEngineering Department, Trumpington Street, Cambridge CB2 1PZ, United Kingdom
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Abstract

The achievement of large size displays and the capability of high throughput low temperature laser re-crystallised polysilicon TFTs to provide complex circuitry has opened up new market opportunities, such as the “system on panel” architecture, where the circuitry necessary for the operation of an interactive portable computer is to be fabricated on the display substrate. In the development of polysilicon technology for these applications, device physics and modelling are expected to play a major role as they have done in the case of single crystal silicon. However, polysilicon TFTs present a much higher level of complexity than single crystal devices, due to the presence of grain boundaries and associated defects which drastically affect the electrical properties. For the first time, a polysilicon TFT parameter extractor has been developed based on data from capacitance (C-V) and conductance (I-V) measurements. The method yields the flat band voltage, the front interface state density and the bulk density-of-states (DOS) for the entire range. The method is applied to laser re-crystallised polysilicon TFTs and verified via comparison with 2-D simulation. It is found that this technique allows a much higher degree of accuracy than other methods published so far.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 507: Symposium A – Amorphous & Microcrystalline Silicon Technology 1998 , 1998 , 365
Copyright
Copyright © Materials Research Society 1998

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References

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