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Preparation and Characterization of Low Temperature Silicon Dioxide Thin Films Using Tetramethylsilane (TMS) for Microfabrication Applications

Published online by Cambridge University Press:  17 March 2011

Xin Lin  and
Stephen J. Fonash
Xin Lin
Affiliation:
SMARTMOS Technology Center, DigitalDNA Laboratory, Motorola SPS, 2200 West Broadway Road, M350, Mesa, AZ 85202, U.S.A
Stephen J. Fonash
Affiliation:
PSU Nanofabrication Facility, The Pennsylvania State University, University Park, PA 16802, U.S.A
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Abstract

Low temperature silicon dioxide depositions have been carried out by plasma enhanced chemical vapor deposition (PECVD) using TMS as the Si precursor at 100-200°C at the pressure of 2-8 Torr. An RF power of 40 W and a TMS:O2 gas flow rate ratio of 1:500 without inert gas dilution were used in the depositions. It was found that the current-voltage (I-V) characteristics of as-deposited oxide films improved as the substrate temperature increased or deposition pressure decreased. Oxide films deposited at 2-3 Torr exhibited typical Fowler-Nordheim (F-N) tunneling characteristics and breakdown voltages greater than 8 MV/cm. The best capacitance-voltage (C-V) characteristics, giving a small flat band voltage shift, a small amount of positive oxide charge, a small hysteresis in bi-directional C-V sweep, and a low interface trap density, were obtained at 3 Torr. Post-deposition annealing in forming gas at the deposition temperature was performed and proved to be an effective approach for improving the electrical properties of the deposited oxide films without compromising the low temperature aspect of the process. By annealing at 200°C, the F-N tunneling barrier height increased by as much as 0.6 eV, the flat-band voltage and the hysteresis in C-V sweep were reduced by 0.74 V and 0.08 V, respectively. In addition, hydrogen was found to play a key role in the annealing treatment and its mechanisms were discussed.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 685: Symposium D – Advanced Materials and Devices for Large-Area Electronics , 2001 , D13.2.1
Copyright
Copyright © Materials Research Society 2001

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