Hostname: page-component-6bf8c574d5-8gtf8 Total loading time: 0 Render date: 2025-02-22T08:02:03.557Z Has data issue: false hasContentIssue false
  • English
  • Français

Sub 50nm Strained n-FETs Formed on Silicon-Germanium-on-Insulator Substrates and the Integration of Silicon Source/Drain Stressors

Published online by Cambridge University Press:  01 February 2011

Grace Huiqi Wang ,
Eng-Huat Toh ,
Keat-Mun Hoe ,
S. Tripathy ,
Guo-Qiang Lo ,
Ganesh Samudra  and
Yee-Chia Yeo
Grace Huiqi Wang
Affiliation:
g0404219@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Lab Engineering drive 3, Singapore, 459441, Singapore
Eng-Huat Toh
Affiliation:
g0402602@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Lab Engineering drive 3, Singapore, 459441, Singapore
Keat-Mun Hoe
Affiliation:
g0404219@nus.edu.sg, Institutue of Microelectronics, Singapore, 117685, Singapore
S. Tripathy
Affiliation:
g0404219@nus.edu.sg, Institute of Materials Research & Engineering, Singapore, 117602, Singapore
Guo-Qiang Lo
Affiliation:
g0404219@nus.edu.sg, Institutue of Microelectronics, Singapore, 117685, Singapore
Ganesh Samudra
Affiliation:
eleshanr@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Lab Engineering drive 3, Singapore, 459441, Singapore
Yee-Chia Yeo
Affiliation:
eleyeoyc@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Silicon Nano Device Lab Engineering drive 3, Singapore, 459441, Singapore
Get access

Abstract

Silicon (Si) source and drain (S/D) regions have been successfully integrated in thin-body silicon-germanium-on-insulator (SGOI) n-FETs. The selectively grown Si S/D induces uniaxial tensile strain in the SiGe channel. Devices with gate length LG down to 50 nm were fabricated. The Si S/D gives rise to 40% higher saturation drive current IDsat for transistors fabricated on Si0.60Ge0.40-on-insulator substrates. For n-FETs fabricated on Si0.75Ge0.25-on-insulator substrates, a 27% IDsat enhancement was observed. Lattice mismatch between the silicon S/D region and the SiGe channel was exploited to induce lateral tensile strain and vertical compressive strain in the channel, leading to enhancement in electron mobility. Analyses of contributions from the tensile strain to mobility enhancement and performance improvement are discussed

Keywords

Gestress/strain relationshipepitaxy
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 995: Symposium G – Extending Moore's Law with Advanced Channel Materials , 2007 , 0995-G03-04
Copyright
Copyright © Materials Research Society 2007

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Shang, H., Schmidt, H. O., Chan, K. K., Copel, M., Ott, J. A., Kozlowski, P. M., Steen, S. E., Cordes, S. A., Wong, H.-S. P., Jones, E. C. and Haensch, W. E., Technical Dig. International Electron Device Meeting, Dec. 2002, Washington DC, pp. 441–444.Google Scholar
2. Wang, H.C.-H., Chen, S.-J., Wang, M.-F., Tsai, P.-Y.; Tsai, C. –W.; Wang, T.-W., Ting, S.M., Hou, T.-H., Lim, P.-S., Lin, H.-J., Jin, Y., Tao, H.-J., Chen, S.-C., Diaz, C.H., Liang, M. –S., Hu, C., Technical Dig.International Electron Device Meeting, Dec. 2002, Washington DC, pp. 161–164.Google Scholar
3. Irisawa, T., Tokumitsu, S., Hattori, T., Nakagawa, K., Koh, S., and Shiraki, Y., Applied Physics Letters, vol. 81, no. 5, pp. 847–849, July 2002.Google Scholar
4. Wang, G. H., Toh, E. H., Lim, Y. L., Tung, C.-H., Choy, S.-F., Samudra, G., and Yeo, Y.-C.: Applied. Physics Letters.,vol. 89, no.5, pp.3109–3111, 2006.Google Scholar
5. Yeo, Y.-C., Semiconductor Science and Technology, vol. 22, pp. S177–S182, Jan. 2007.Google Scholar
6. Wang, G. H., Toh, E.-H., Tung, C.-H., Du, A., Lo, G.-Q., Samudra, G., and Yeo, Y.-C., Japanese Journal of Applied Physics, vol. 46, no. 4B, Apr. 2007.Google Scholar
7.Taurus Users Manual, Synopsys Inc., 2005.Google Scholar
8. Niu, G., Cressler, J., Mathew, S., and Subbanna, S., IEEE Trans. Electron Devices, vol. 46, no. 9, p. 1912–1914, Sep. 1999.Google Scholar