A TFT Strategy for Polymer Circuits

Abstract

Although integrated circuit design principles are well understood, they lead to the possibility of radically new modes of device operation when applied to conjugated polymers. Design for speed is very important, even when this is not a primary requirement for a particular application, since supply voltage can be reduced and with it power dissipation. For all-polymer circuits, on thermally insulating plastic substrates, device operating temperature will also be reduced. This has implications for device stability. There are a number of factors that are important in increasing circuit speed. Reduction of channel length must be accompanied by a reduction of gate overlap capacitance and this makes the conventional versions of bottom gate TFT perform badly. Vertical devices are a particularly attractive proposition providing that off-currents can be maintained at a low level. One approach is to use Schottky barriers as the source and drain. Examples will be explained, as will the very unusual mode of operation of such devices. Optimum load structures will also be defined.