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A logic programming approach to predict effective compiler settings for embedded software

Published online by Cambridge University Press:  03 September 2015

CRAIG BLACKMORE
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)
OLIVER RAY
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)
KERSTIN EDER
Affiliation:
Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, United Kingdom (e-mail: craig.blackmore@bristol.ac.uk, oliver.ray@bristol.ac.uk, kerstin.eder@bristol.ac.uk)

Abstract

This paper introduces a new logic-based method for optimising the selection of compiler flags on embedded architectures. In particular, we use Inductive Logic Programming (ILP) to learn logical rules that relate effective compiler flags to specific program features. Unlike earlier work, we aim to infer human-readable rules and we seek to develop a relational first-order approach which automatically discovers relevant features rather than relying on a vector of predetermined attributes. To this end we generated a data set by measuring execution times of 60 benchmarks on an embedded system development board and we developed an ILP prototype which outperforms the current state-of-the-art learning approach in 34 of the 60 benchmarks. Finally, we combined the strengths of the current state of the art and our ILP method in a hybrid approach which reduced execution times by an average of 8% and up to 50% in some cases.

Type
Regular Papers
Copyright
Copyright © Cambridge University Press 2015 

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