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In this chapter, we describe four realized examples of discrete-time receivers that are largely based on the architecture and circuitryintroduced in previous chapters. Starting with a commercial DT receiver designed for GSM single-chip radios, which introduces the novel low-pass IIR filter, we then continue with three highly reconfigurable superheterodyne receivers that employ the complex IQ charge-sharing band-pass filter (BPF) for image rejection.
We start the book with the basics. In this chapter, we first present the motivation and fundamentals of discrete-time (DT) radio-frequency (RF) signal processing, and an overview of zero/low intermediate-frequency (IF) and superheterodyne receiver architec-tures. Then, different sampling schemes present in the state-of-the-art zero-IF DT receivers are studied using a simplified DT receiver. At the end, a 4×-sampling concept is introduced for use in DT high-IF receivers.
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