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Mixed-Signal CMOS for Wireline Communication Published online by Cambridge University Press: 05 December 2024
With PLLs and ILOs introduced in Chapter 14, this chapter introduces and presents the systems that synchronize clocks to incoming data, known as clock and data recovery (CDR) systems. The chapter starts with an introduction and discussion of the metrics of CDRs. Phase detection is done differently in CDRs compared to PLLs. This is explained before the most common approaches are described. Several options are available to the designer for how phase comparisons should be acted on. These are presented and compared next. The chapter continues with an introduction to baud-rate phase detection schemes built on Mueller–Muller phase detection.
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