This article introduces the February 2003 issue of MRS Bulletin on “Single-Event Upsets (SEUs) in Microelectronics.” These radiation effects in devices and circuits have been recognized in recent years as a key reliability concern for many current and future silicon-based technologies. This introduction sets the scope for critical discussions on this subject. The articles in the issue reflect the interdisciplinary nature of SEU research. The contributing authors include experts from several specializations: technology reliability, materials science, device physics, circuit designs, and theoretical and experimental nuclear physics. We review the current understanding of SEU problems from the perspectives of radiation physics, circuit design issues, and global technology developments. The discussions cover the key areas of modeling, circuit analyses, accelerator tests and experiments, basic nuclear data, and environmental neutron measurements.

We review the current understanding of single-event upsets (SEUs) in microelectronic devices. In recent years, SEUs have been recognized as one of the key reliability concerns for both current and future technologies. We identify the major sources of SEUs that impact many commercial products: (1) alpha particles in packaging materials, (2) background radiation due to cosmic rays, and (3) thermal neutrons in certain device materials. The origins of SEUs are examined from the standpoint of the fundamental atomic and nuclear interactions between the intruding particles (alpha particles, cosmic rays, and thermal neutrons) and semiconductor materials. We analyze field funneling, which is a key mechanism of charge collection in a device struck by an ionizing particle. Next, we formulate how SEU cross sections and SEU rates are calculated and discuss how these basic quantities are related to experiments. Finally, we summarize the major SEU issues regarding modeling, bulk complementary metal oxide semiconductor technologies, and research on future, exploratory technologies.

The once-ephemeral soft error phenomenon has recently caused considerable concern for manufacturers of advanced silicon technology. Soft errors, if unchecked, now have the potential for inducing a higher failure rate than all of the other reliability-failure mechanisms combined. This article briefly reviews the three dominant radiation mechanisms responsible for soft errors in terrestrial applications and how soft errors are generated by the collection of radiation-induced charge. Scaling trends in the soft error sensitivity of various memory and logic components are presented, along with a consideration of which applications are most likely to require intervention. Some of the mitigation strategies that can be employed to reduce the soft error rate in these devices are also discussed.

This article approaches single-event upset (SEU) problems from the standpoint of experimental nuclear physics, with a focus on certain neutron experiments and neutron data essential for SEU studies. A review is given of some research programs, both basic and applied, that are strongly motivated by SEU applications. Some specific examples are presented from the The (short for Theodor) Svedberg Laboratory (TSL) in Uppsala, Sweden: First, using the quasi-monoenergetic neutron beam, SEU cross sections (of chips) are measured over the neutron energy range of 20–150 MeV. Data from the same technology generation, in general, can be fitted into a simple curve. Second, the particle origins of SEUs are discussed from the framework of neutron–nucleus spallation reactions.

Historically, radiation-induced corruption of data in high-speed complementary metal oxide semiconductor designs has been limited to on-board static random-access memory in various memory caches. Successive generations of scaling, however, have resulted in capacitance reductions in key logic circuits, increasing their vulnerability to these “soft errors.” Charge delivered by radiation events now carries a substantial probability of inducing upsets, not only in bistable elements, but in logic evaluation circuits as well. This article introduces the reader to common logic-circuit topologies in high-speed microprocessors, radiation circuit response mechanisms that can compromise logic evaluation integrity, and existing techniques that mitigate this exposure.

Neutrons from collisions of cosmic rays with the nuclei of atoms in the atmosphere are an irremovable external radiation that causes single-event upsets in microelectronic devices. Predicting soft error rates requires knowledge of the flux and energy distribution of the cosmic-ray-induced neutrons. This article reviews cosmic-ray neutrons in the atmosphere and on the ground, the factors that determine their intensity, and recent calculations and state-of-the-art measurements of neutron spectra covering 12 decades of energy, from the thermal energy range up to 10 GeV.

When exposed to radiation, the function of microelectronic devices is not only degraded by single-event phenomena but by cumulative effects. Most of the energy lost by radiation passing through semiconductors is through ionization. Buildup of charge in gate oxide layers and of interface and border traps due to ionization result in semipermanent damage to the device. These effects are known as total ionizing dose effects. A fraction of the energy of the radiation passing through semiconductors is lost to displacement of atoms from their sites in the crystal lattice structure. The buildup of displacement damage with radiation exposure causes gradual but permanent changes in device performance and limits device lifetime in a radiation environment. Displacement damage will be discussed in the context of non-ionizing energy loss.