A Wireless Chip Interface
Published online by Cambridge University Press: 17 September 2021
Chapter 2 provides an in-depth and intuitive description of TCI, starting with its basic structure and fundamental operating principle. It explains how the transceiver and inductive coupling coils are designed, their electrical characteristics, and design variations. This is followed by an intuitive explanation of how to do design trade-offs to optimize for different performance requirements, with particular emphasis on design options for optimal power and area efficiency respectively. Integration options – 2/2.5/2.9/3D – are also presented to illustrate implementation flexibility. Two power delivery solutions are then introduced, one using wireless and the other advanced doping technologies. Next, three application examples are described, providing insight into how TCI can be adopted and adapted and quantifying performance improvement against conventional wideband DRAM, stacked flash memory, and network-on-chip solutions. Specific challenges in each of the application areas are elaborated and how TCI can be adapted to address these challenges is explained. The chapter concludes with two postscripts. The first introduces a sample of TCI research carried out in other institutions in parallel to our effort. The second provides an overview of collective synchronization, which is utilized to create a low-cost clock distribution solution for TCI.
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