Soldering to Cu interconnect pads with Sn-containing alloys usually leads to the formation of a layered Cu3Sn/Cu6Sn5 structure on the pad/solder interface. Frequently, microscopic voids within Cu3Sn have been observed to develop during extended thermal aging. This phenomenon, commonly referred to as Kirkendall voiding, has been the subject of a number of studies and speculations but so far the root cause has remained unidentified. In the present work, 103 different Cu samples, consisting of 101 commercially electroplated Cu and two high-purity wrought Cu samples, were surveyed for voiding propensity. A high temperature anneal of the Cu samples before soldering was seen to significantly reduce the voiding level in subsequent thermal aging. For several void-prone Cu foils, the anneal led to significant pore formation inside the Cu. In the mean time, Cu grain growth in the void-prone foils showed impeded grain boundary mobility. Such behaviors suggested that the root cause for voiding is organic impurities incorporated in the Cu during electroplating, rather than the Kirkendall effect.