The demand for increasingly higher performance semiconductor products has stimulated the semiconductor industry to respond by producing devices with increasingly complex circuitry, more transistors in less space, more layers of metal, dielectric and interconnects, more interfaces, and a manufacturing process with nearly 1,000 steps. As all device features are shrunk in the quest for higher performance, the role of Transmission Electron Microscopy as a characterization tool takes on a continually increasing importance over older, lower-resolution characterization tools, such as SEM. The Ångstrom scale imaging resolution and nanometer scale chemical analysis and diffraction resolution provided by modem TEM's are particularly well suited for solving materials problems encountered during research, development, production engineering, reliability testing, and failure analysis. A critical enabling technology for the application of TEM to semiconductor based products as the feature size shrinks below a quarter micron is advances in specimen preparation. The traditional 1,000Å thick specimen will be unsatisfactory in a growing number of applications. It can be shown using a simple geometrical model, that the thickness of TEM specimens must shrink as the square root of the feature size reduction. Moreover, the center-targeting of these specimens must improve so that the centertargeting error shrinks linearly with the feature size reduction. To meet these challenges, control of the specimen preparation process will require a new generation of polishing and ion milling tools that make use of high resolution imaging to control the ion milling process. In addition, as the TEM specimen thickness shrinks, the thickness of surface amorphization produced must also be reduced. Gallium focused ion beam systems can produce hundreds of Ångstroms of amorphised surface silicon, an amount which can consume an entire thin specimen. This limitation to FIB milling requires a method of removal of amorphised material that leaves no artifact in the remaining material.

As ULSI device critical dimensions continue to shrink to submicron sizes, electron microscopy techniques such as electron beam induced current (EBIC) and voltage contrast are finding more applications towards pinpointing failure sites for subsequent cross sectioning or deprocessing. In addition to the traditional use of EBIC for junction delineation, EBIC has been applied to locate leakage sites in capacitor structures and silicon-on-insulator (SOI) devices as well. Similarly, voltage contrast has been applied to identify single or multiple opens in via chains which consist of thousands of vias. In addition to a brief revisit of the basic principles of EBIC and voltage contrast, focus will be placed on the application of EBIC and voltage contrast in failure analysis of semiconductor devices. Examples of using voltage contrast combined with precision cross section focused ion beam (XFIB) for identifying the failure mechanism of 0.8μm vias will be presented. Also, the use of EBIC for identifying leakage sites in SOI and bipolar devices and subsequent FIB/scanning electron microscopy (SEM) analysis will be presented.

Plan view or “top down” sections of specific sites for TEM analysis can be prepared by mechanically polishing the specimen with the Tripod Polisher. This technique produces plan view sections with a large area available for TEM analysis that encompasses the specific site. Because the sample is mechanically polished, the problem of surface topography due to non uniform thinning is minimized.

As semiconductor device sizes continue to decrease, the degree of accuracy needed for electron microscopy and microanalyis of such materials increases. To achieve such accuracy, small electron probes with high beam currents are needed. The combination of these two factors results in an increase in the amount of carbonaceous contamination formed on the specimen under the electron beam. Recently, the use of low energy plasmas has been shown to be effective in preventing such contamination from occurring [1–7]. For TEM, the simultaneous placement of the specimen holder and specimen into such a plasma for short periods of time results in the ability to hold a converged probe on the specimen for analysis without contamination becoming an problem. Furthermore, in this presentation we show that existing contamination from prior TEM analysis can be removed from the specimen by plasma cleaning. The benefits of plasma cleaning are not solely limited to TEM. SEM specimens, as well as SEM specimen holders, aperture strips, tweezers and other electron microscopy accessories can readily be inserted into the plasma chamber for cleaning.

In focused ion beam (FIB) fabrication of cross-sectional transmission electron microscopy (X-TEM) specimens, highly accelerated ion beams sometimes cause serious damage. The damage can be induced in both the specimen surface and in the side walls. We used X-TEM observations to investigate the side-wall damage induced by FIB fabrication in crystalline silicon. The damaged layer was found to be about 20 nm thick in the case of 30-keV FIB etching. We tried to reduce the damage by several methods, such as gas-assisted etching (GAE) with iodine, broad argon ion milling and wet etching. The damaged layer was 19 nm for GAE and 12 nm for argon ion milling with a beam current of 70 mA and the tilt angle between the beam and the specimen of 15 degrees. Wet etching using a mixture of nitric and hydrofluoric acid removes most of the damaged layer.

Application of transmission electron microscopy on sub-half micron devices has been illustrated in terms of process evaluation and failure analysis. For process evaluation, it is emphasized that a large number of features need to be examined in order to have reliable conclusions about the processes, while for failure analysis, the goal is to pin-point a single process step causing failure or a single source introducing the particle defect.

Transmission electron microscopy (TEM) is a useful tool in process evaluation and failure analysis for semiconductor industries. A common focus of semiconductor TEM analyses is metalization vias (plugs) and it is often desirable to cross-section through a particular one. If the cross-sectional plane deviates away from the center of the plug, then the thin adhesion layer around the plug will be blurred by surrounding materials such as the inter-layer dielectric and the plug material. The importance of these constraints, along with the difficulty of precision sample preparation, has risen sharply as feature sizes have fallen to 0.25 μm and below. The suitability of common sample preparation techniques for these samples is evaluated.

New analytical techniques are being employed to meet the stringent requirements for controlling defects in semiconductor manufacturing. While SEM/EDX continues to be an effective tool for root-cause analysis of particles and defects on the wafer surface, increasingly it is necessary to employ multiple techniques in analysis of a single defect to obtain sufficient information to resolve the problem. Until recently, this approach was impractical because the defects were too difficult to locate in standard analytical tools, especially on unpatterned wafers. But with the newly developed Mark-Assisted Defect Analysis (MADA) technique, the positioning problem has been eliminated, and it is a simple matter to employ multiple techniques on the same defect. In this paper we present results for defects analyzed by SEM/EDX, TOFSIMS, μ-ESCA, and AUGER, highlighting how these techniques compliment each other. Particular emphasis is given to the issue of the analytical technique changing the sample chemistry and influencing the results of subsequent analysis techniques.

Small particles in ULSI devices are one of the key causes for affecting device yield. This is especially true since modern devices are shrinking in all dimensions and the critical size for ‘killer’ particles is also shrinking. It is increasingly challenging to identify the root cause of particle contamination in terms of locating and identifying the particles. A precision cross section through the particles is required to be able to identify at which processing step the particles occurred and an energy dispersive spectroscopy (EDS) microanalysis usually helps identify the source. This paper focuses on the methodology for carrying out submicron defect and particle analysis. In addition to processing knowledge, it demonstrates the importance of techniques such as scanning electron microscopy (SEM), EDS, and focused ion beam (FIB). The analysis of microcorrosion observed after third metal deposition, and submicron titanium particles after metal etch are used as vehicles to illustrate the procedure of submicron particle analysis.

X-ray diffraction (XRD) is generally used to measure crystallographic texture, but complete analysis is rarely performed. Orientation imaging microscopy (OIM) gives similar data by electron diffraction and has potential for widespread use since it may be added to any scanning electron microscope. Analysis software has been developed to reduce QIM results into a form which may be compared directly to XRD results. OIM texture parameters measured from Al films showed good quantitative agreement with XRD parameters, however the texture in Cu films is more complex and difficult to compare. Although subject to certain limitations, OIM has several advantages over XRD including more efficient data collection, better sensitivity to minor texture components, and more flexible data analysis.

As miniaturisation proceeds, the electrical properties of conductive films used in modem IC's are increasingly influenced by the grain sizes and the texture of the films. There is a need therefore to devise techniques which can examine these properties. Described in this work are two new cross-sectional TEM techniques for use on fully-processed IC's to determine quantitatively grain size distributions and the degree of texture in a film. The technique which investigates texture is used to determine how quickly the texture develops through a polysilicon film.

The phase sequence of the RTP induced reaction at T=650°C has been studied. We found that pre-amorphization of poly-Si substrates does not change the reaction path. i.e. Ti5Si4, and C-49 TiSi2 phases were formed_ with the latter growing upon further anneal. In the Mo doped poly-Si/Ti system the C-54 TiSi2 phase has formed along with Ti5Si4 and two Mo silicide phases, MoSi2 and Mo5Si3; no C-49 TiSi2 was observed. We show that the reaction in the Mo doped system follows the template mechanism with MoSi2 and Mo5Si3 based phase acting as template phases for accelerated growth of C-54 TiSi2.

Titanium silicide films grown on silicon were analyzed by transmission electron microscopy (TEM), electron diffraction, scanning transmission electron microscopy (STEM), and energy dispersive x-ray spectroscopy. The films were prepared by sequential rapid thermal annealing (RTA) at 675 °C and 850 °C of 16-nm-thick sputtered Ti on Si (001) wafers. In some cases, a 20-nm-thick TiN capping layer was deposited on the Ti film before the RTA procedure and was removed after annealing. TEM and STEM analyses showed that the silicide films were less than 0.1 μm thick; the capped film was more uniform, ranging in thickness from ∼ 25 – 45 nm, while the uncapped film ranged in thickness from ∼ 15 – 75 nm. Electron diffraction was used to determine that the capped film contained C54-TiSi2, C49-TiSi2, Ti5Si3, and possibly TiSi, and that the uncapped film contained C49-TiSi2, TiSi, Ti5Si3, unreacted Ti, and possibly C54-TiSi2.

Fusible links, fabricated from silicon rich chromium disilicide thin films, were subjected to voltage pulses in the 3–6 volt range. An optimum voltage existed at which the fuses blew. Transmission electron microscopy (TEM) was used to study the microstructural characteristics of the fuses both before and after the application of the voltage pulses. The TEM characterization, coupled with electrical and physical measurements, revealed that the mechanism underlying the fuse blow was hole current induced Si electromigration. Below the optimum voltage, the amount of Si transported was insufficient to cause fuse rupture. Above the optimum voltage, the current- voltage characteristics of the fuses became nonlinear and a unique sequence of material phases was formed. The composition of the phases suggests that both thermomigration and electromigration processes were operating at voltages above the optimum voltage.

We find that sheet resistance of tungsten polycide can be reduced up to 40% by depositing thin polysilicon layers on the top of the films. Transmission electron microscopy shows no significant differences in the crystal structure, grain size, or dislocation density inside the films by adding a polysilicon cap, but it clearly shows roughening of the top interface. Auger depth profiling shows substantial reduction of the Si/W ratio in the capped films. Both results imply that the excess Si segregates to both polysilicon interfaces, effectively lowering the Si/W ratio and resulting in a low sheet resistance.

Al-spiking in contacts to Si were studied on a microscopic scale by a detailed cross sectional TEM analysis. Electron spectroscopic imaging and energy dispersive x-ray microanalysis with a I nm high-current electron probe formed by a field emission gun helped to identify the Al-diffusion paths and the reaction mechanisms which lead to contact failure. Combinations of advanced PVD-Ti/TiN barrier layers and cold/hot or high-pressure AlSiCu-fills revealed that the highly rugged TiN barrier sidewalls and thick Ti sidewall layers are the weak points which cause Al-spiking.

Energy-filtering TEM is applied to characterize the microstructures in ULSI devices. Three cases are shown for EFTEM applications: interfacial reactions in Al metallization, phase identification after arcing in Al metallization, and ONO structure.

Cobalt films are sputter deposited on Si0.8Ge0.2 layers grown epitaxially on Si substrates. Compared with the silicidation on pure silicon, there is a retardation of the disilicide formation in the SiGe case. The conversion of the monosilicide into the disilicide strongly depends on the thickness of the initial SiGe layers. For the silicidation of titanium on poly-SiGe layers, the increase of the Ge content favours the nucleation of C54 titanium germanosilicide, hence helping the transition from the C49 to the C54 phase on the blanket layers. The thickness of the final C54 Ti-germanosilicide layers formed on narrow poly-Sil-×Gex runners is independent of the line width and the Ge concentration.

We describe novel techniques which extend the range of available nanostructural characterization capability for semiconductor materials and devices. These techniques combine high spatial resolution imaging and spectroscopy using transmission electron microscopy (TEM) and focused ion beam (FIB) microscopy. Specific capabilities described include nanoscale imaging of dopant distributions, ultra-high resolution secondary ion mass spectroscopy (SIMS) and tomographic image reconstruction.

We present a methodology suitable for SEM and TEM analysis on Heterojunction Bipolar Transistors (HBT) developed for microwave applications. The Focused Ion Beam (FIB) technique has been investigated for SEM observations. It is found that best results are obtained when the active areas are micromachined from the back side and at a low incidence angle. The help of backscattered electron imaging for metallurgical assessment is emphasized on that kind of devices. A combination of both precision dimpling and FIB micromachining is found to be a good solution for the achievement of TEM slabs with an acceptable thickness. Finally we present the design of a dual beam system which uses Ar+ or Ga+ ions for highest TEM slab quality built into a SEM for an accurate localization and monitoring of the milling process. The respective advantages and limitations of this method are stressed in term of precision of localization of device features, surface roughness, contamination and slab thickness. The possibility to apply this technique on 0.1 µm silicon based technology will be discussed.