High quality SiC and AlN films allow the fabrication of metal/AlN/SiC MIS structures and SiC/AlN heterostructures that require a low lattice mismatch and excellent thermal stability. Epitaxial SiC on AlN/sapphire was grown using hexamethyldisilane (HMDS) by MOVPE. 2HAlN is epitaxially grown on sapphire by MOCVD, and subsequently SiC is deposited on it. The growth of high quality SiC was achieved in a one step process without any nucleation step using dilute hydrogen in argon (12% H2 + Ar) as the carrier gas, which is less explosive than pure H2. The effect of growth temperature and thickness of AlN on the SiC crystal quality and the surface smoothness were studied. All films were analyzed using reflection high energy electron diffraction (RHEED), Nomarski differential interference contrast microscopy (NDIC), X-ray diffraction (XRD), and atomic force microscopy (AFM). Optimum temperature for SiC growth was between 1300°C and 1350°C. At these temperatures, the grown films show strong epitaxial relationship with AlN and very smooth surfaces (RMS ∼ 0.1- 0.75 nm). At temperatures below 1300°C, the film becomes polycrystalline. At 1400°C, the films show highly textured features, observed by XRD. In the RHEED, however, weak rings appear superimposed on the spot pattern, which implies the grown films are polycrystalline but highly textured. In order to evaluate the effect of underlying AlN thickness on the SiC film, layers with various thicknesses (50, 200, 400 nm) have been used at 1350°C. The SiC film on a 50 nm thick AlN layer shows a very smooth surface (RMS ∼ 0.1 nm) compared to the SiC film on a 400 nm (RMS ∼ 0.7 nm) AlN layer. This seems to be caused by the increasing roughness of the underlying AlN, as it becomes thicker. However, all the films show highly epitaxial growth features, which implies that 50 nm is sufficient to relieve the mismatch strain of the underlying AlN/sapphire.

Shallow implantations of Ga ions were performed on p-type 6H-SiC by conventional broad area implantation, and the physical and electrical properties of the Ga-SiC system upon high temperature annealing were examined, in order to understand the role of Ga in ohmic contact formation. The shallow implantation depth (30 nm) and high Ga doses ranging between 1×1015 and 1×1016 cm−2, resulted in heavy surface damage as observed by atomic force microscopy surveys. Samples annealed using a sacrificial SiC wafer as a capping layer, showed no improvement in surface roughness for annealing up to 1300 °C, while at 1500 °C, surface roughness was markedly changed. At 1600 °C the surface re-crystallized back to the stepped terraced morphology of the un-implanted surface but with significantly larger step and terrace size. At this annealing temperature, heavy Ga loss from the surface was observed. Samples annealed at 1500 °C using an AlN capping layer, showed significant outdiffusion of Si into the AlN layer, and redistribution of Ga within the SiC surface. The contact resistance of as-implanted and annealed samples using the sacrificial SiC wafer, were measured by the TLM method. Although contact resistance was found to decrease with increasing annealing temperature, sheet resistance increased, and contact resistance values were higher than expected, indicating that the heavy loss of Ga atoms contributed to the increased levels of contact resistance.

Current SiC metal-oxide-semiconductor-field-effect-transistors (MOSFETs) have regions of the gate electrode that overlaps the source/drain contact implant. The source/drain region is electrically isolated from this gate electrode extension by the gate insulator. Typically, the gate insulator is established through a controlled thermal oxidation step. The performance of the electrical isolation between the gate electrode and the source/drain implant region is studied using MOS systems for the nitrogen and phosphorus implant species. The dielectric strength of thermal oxide grown over a phosphorus implanted region is about four times lower than a non-implanted region and about two times lower than the nitrogen implanted region for the same implant and anneal conditions.

The electrical properties and thermal stability of TaC ohmic contacts with W/WC overlayers were investigated on n-type 6H-SiC (0001) substrates. The specific contact resistance (SCR) was measured after annealing at 600 °C and 1000 °C for 50 ∼ 1000 h. The SCRs (3.0 ∼ 3.6 ×10−5 Ωcm2) of contacts annealed at 600 °C for 1000 h remained constant within the experimental error. Significant increases in the SCR were not observed until the samples were annealed at 1000 °C for several hundred hours.

No reaction of the film with the SiC substrate was observed after annealing at 600 °C for 1000 h; however, atomic-scale reactions appeared to be concentrated adjacent to grain boundaries in the reacted film. From Auger depth profiles, it was found that W and WC reacted to form W2C on TaC after annealing.

According to SIMS analysis, after annealing at 1000 °C for 600 h, small but measurable changes in the electrical characteristics were associated with O incorporation at the interface between TaC and SiC. Investigation of the W/WC/TaC/SiC interface by TEM indicated that a reaction between the metal layers had occurred, but there was no observed reaction with the SiC substrate. After annealing for 1000 h, substantial changes in the contacts were observed. The findings indicate that both oxidation and metallurgical reactions have important implications on the current operating limits for SiC high temperature devices.

A layer of porous SiC was fabricated by surface anodization of commercial 4H and 6H-SiC (0001)Si face off-axis wafers. A 8.5 μm 4H–SiC epilayer was grown on porous SiC (PSC) substrates using atmospheric pressure CVD. TEM investigation on cross-sectional specimens of the CVD epitaxial layers revealed that the presence of pores in the substrate does not lead to the formation of any micropipe in the epitaxial layer. The investigation also failed to detect a more than usual dislocation density on the basal plane of the epitaxial layer. Based upon the results of various analytical techniques applied to the CVD deposit we propose that the density of screw dislocations in the epitaxial layer is less than 5–104 cm−3. It should be noted that the density of similar types of dislocations in the initial substrate as determined by the TEM was ∼106 cm−3, so this preliminary investigation indicates that the epitaxial layer grown on PSC may have a reduction in dislocation density of more than an order of magnitude over those grown on conventional SiC substrates that are not porous. Synchrotron white beam x-ray topography (SWBXT) was performed on these layers. Comparison between the dislocation density on the porous and standard epitaxial layers proved to be very similar using this technique.

Thermal oxides were grown on n-type 6H-SiC(0001) at 1100 °C for 2 hrs in a wet oxygen ambient after the substrates were cleaned using the complete RCA cleaning process. Metal-oxide-semiconductor (MOS) diodes were then fabricated and subsequently cleaned under different annealing conditions, including re-oxidation-, NO-, and forming gas (10% H2 + 90% N2)-annealing at 950 °C for one hour. Measurements of the interface state densities (Dit) at room temperature showed that post oxidation annealing (POA) reduced the Dit values to a varying degree depending on the specific annealing condition. Annealing in NO and forming gas resulted in the largest reduction in Dit values.

Oxides were grown at 950, 1100, and 1250 °C for varying amounts of time without receiving POA. A non-stoichiometric (SixC, x>1) transition layer adjacent to the SiO2/SiC interface has been observed by electron energy loss spectroscopy (EELS). The thickness of this layer was found to increase with oxidation temperature and was not observed at all for a thin oxide grown at 950 °C. The Dit values (close to the conduction band) for diodes with oxides grown at 950°C without POA were lower than the Dit values for the samples oxidized at 1100 °C with any of the POA treatments. While the thickness of the transition layer was found to be dependent on temperature, our results indicate that it is independent of oxide thickness. This transition layer may be associated with the high Dit values and low channel mobilities for SiC MOSFETs.

The spontaneous nucleation of “negative” crystals from the solute of vacancies in SiC does not appear to be dominant due to the low super-saturation of vacancies. However, clustering of the vacancies is possible due to the energy gain in the system caused by coalescence of any two vacancies. The major reasons for point and planar defect formation in SiC are the liquid phase of free silicon and non-stoichiometry of the vapor.

Carbonized buffer layers were formed on Si (100) nominally oriented substrates with propane diluted in palladium purified hydrogen in a cold wall vertical reactor. Subsequent SiC layers were grown using silane and propane at atmospheric pressure. The growth temperature was ranging from 1150°C to 1350°C. The layers obtained were characterized by LT photoluminescence, IR reflectivity, X-ray diffraction, micro-Raman on cleaved edges, AFM imaging, and optical microscopy. Drastic influence on the layer surface morphology was evidenced depending on the transition step between the carbonization and the SiC epitaxial growth. As a result, we have developed a carbonization process leading to very high quality 3CSiC films grown at 1250°C.

Sublimation growth of 6H-SiC has been studied with respect to surface morphology, growth temperature, supersaturation and growth rate. Growth was performed on the C-terminated face of 6H seeds mainly and for comparison also the Si-terminated face was used. Step bunching is observed dependent on different parameters and is strongly influenced by the seed orientation. The growth rate of 4H on the C-face is found to be higher than the rate of 6H grown on the Siface.

Inverse modeling was applied to the optimization of a crucible design for SiC sublimation growth. We found a crucible shape providing the optimal temperature distribution in terms of the powder source stability during long-term operation and of the convex crystal shape. Considerable improvement of temperature uniformity throughout the powder charge was achieved. The results obtained show selective sensitivity of the thermal field inside the crucible to modification of the crucible design. The inverse problem approach is easy-to-adapt to various optimization criteria and seems to be especially effective in the case of multi-factor optimization.

The growth of thick epitaxial 4H-SiC layers with low defect density is an essential step for the fabrication of SiC based devices. Cold- and hot wall reactors using silane and propane diluted in hydrogen were used in this study. The typical growth temperature range is 1700–1900 K and total pressure range 10–100 kPa. The resulting epilayers exhibit low background doping, low defect density and good thickness uniformity. The main problem is that it is difficult with this first generation of reactors to ensure a constant temperature over large wafer. A 3D simulation approach of heat and mass transfer was used with three objectives. The first one is to have a visualization of the flow, temperature and gaseous species fields in the standard reactor. The second one is to propose solutions for the optimal control of the temperature field and the subsequent uniformity of the epilayers over large dimensions. The third one is to improve the kinetic databases in this temperature range which has been very little investigated.

Epitaxial and crack-free 3C-SiC film was successfully grown on Si(100)/(111) by a one step process without separate nucleation or carbonization steps at a low temperature of 1200°C by MOVPE. The growth was achieved by using hexamethyldisilane (HMDS) with the addition of a small amount of trimethylgallium (TMG) (0.5 sccm) with dilute hydrogen (12% H2 + Ar) as a carrier gas. Without the addition of TMG during growth, epitaxial growth of SiC on Si was only possible at temperatures above 1300°C following a nucleation step at 1200∼1250°C. After growth, all the films were analyzed by using cross-sectional transmission electron microscopy (TEM), X-ray diffraction (XRD), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS) and Nomarski differential interference microscopy (NDIM). It was observed by XPS that the SiC film contained only a small amount of Ga, which means the Ga component of TMG does not much accumulate in SiC, in spite of a relatively high ratio of TMG/HMDS. To investigate the effect of TMG flow rate, various amounts of TMG (0.5 - 5sccm) were added during SiC deposition. Below 0.5 sccm of TMG flow rate, the SiC film showed epitaxial growth, observed by TEM and XRD. However, with an increasing flow rate of TMG above 1 sccm, the XRD peak of 3C-SiC becomes smaller and slightly shifted. At 5 sccm, the film was polycrystalline possibly implying that the SiC lattice is being strained gradually with TMG addition. It is also observed by AFM that, at the initial stages of growth, nucleation is much facilitated with the addition of TMG. The deposition rate with the addition of TMG at 1200°C is about 650 nm/hr, which is much faster than the rate without TMG addition (480 nm/hr). Thus, it is believed that TMG addition has a positive effect on the nucleation and HMDS decomposition during deposition. Also, with the addition of a small amount of Ar+10%HCl during growth, one-step deposition was possible helped by stress release due to void formation at the SiC/Si interface.

We have investigated the structural and electrical properties of as-prepared and rapid thermal oxynitride films on C+ implanted solid phase epitaxially grown SiC. The oxynitride was grown using N2O. The C concentration of the samples was estimated to be 1, 2 and 5 at. %. From the infrared spectra, samples with 1 and 2 at. % carbon showed that the carbon was substitutionally incorporated into the silicon. No precipitation of SiC was detected. However, for the 5 at. % C sample, some precipitation was observed as indicated by a broad peak at ∼800 cm−1. The oxynitride films showed the Si-O-Si stretching mode at ∼1100 cm−1. The shoulder at 980–1067 cm−1 was due to the O-Si-N bond. The peak at 830 cm−1 was due to the Si-N and Si-C bonds and C-O complex vibrational mode was observed at 663 cm−1. Electrical characterization of the oxynitride films was carried out using the MOS capacitor structure. The interface state density was found to range between 5.7×1011 to 3.35×1012 cm−2eV−1 and increased with an increase in the C concentration. The electrical breakdown field was found to be in the range of 5–7 MV cm−1 and reduced with an increase in C concentration. The charge-to-breakdown value was measured and decreased with an increase in C concentration.

Results from photoluminescence (PL) and Zeeman effect measurements of a PL center, labeled UD-1, in 6H SiC are presented. The spectrum consists of three no phonon-lines (NPLs) at 0.9952, 1.0015 and 1.0020 eV. The luminescence starts decreasing in intensity above 40 K and is completely quenched at 80 K. The observed Zeeman splitting reveals a spin one half of the ground state of the two highest energy lines. No splitting of the 0.9952 eV line is detected. The g║-value for the 1.0015 eV and 1.0020 e║ lines are g║ = 1:4 and g║ = 1:7, respectively. For both lines, g⊥ = 0. The C3v symmetry indicates that the UD-1 center is either a substitutional defect or a complex with its constituents lying along the c-axis of the lattice.

We report ordinary <ε┴> and extra-ordinary <ε║> dielectric function data of 4H- and 6H-SiC from 0.7 to 9.0 eV. These data, which were obtained by with spectroscopic ellipsometry, are in good qualitative agreement with trends recently reported in ab initio calculations.

In this study, the near-surface region of air-exposed thin 3C-SiC films grown on 50-mm (2-in.) diameter Si(111) and Si(211) substrates have been investigated. Carbonization to create the film in a radio-frequency (RF) induction-heated horizontal atmospheric-pressure chemicalvapor- deposition reactor utilized a propane-hydrogen mix (3% C3H8 in ultra-high purity hydrogen) with a hydrogen carrier. Elemental and chemical-state identification of the thin-films are presented. Several structure sensitive techniques including X-ray diffractaion (XRD) in ω-2θ as well as scanning electron microscopy (SEM) to examine crystal structure, surface morphology and film thickness are included.

Transmission electron microscopy (TEM) was used to investigate Al, Ar, C and Si ionimplanted 4H-SiC epilayers. After the implantation the samples were thermally annealed for 30 minutes at 1700°C. During the annealing process dislocation loops are formed and the generation of such dislocation loops upon annealing, is investigated with respect to dopant electrical activation, peak ion concentration and calculated interstitial/vacancy concentrations. It is concluded that the dislocation loops are generated as the result of a combination of residual damage and excess interstitials generated in a “plus one” (+1) process.

We have developed a new and simple method to etch SiC at relatively low temperature with very high rates. This method is particularly useful for cleaning the susceptor after growth. By employing this etching method to clean the susceptor prior to every growth run, we have greatly improved the reproducibility of SiC epitaxial growth and increased the lifetime of the susceptor. The method can also be used to etch SiC wafers at a very fast rate as an alternative to mechanical polishing. An etch rate of over 100μm/hr was obtained at 1600°C using this new method. The surfaces of the etched wafers were examined by atomic force microscope (AFM). Results of epitaxial growth using new etching method are presented.

We have grown epitaxial layer introducing buffer layer using N2 doping on 6H-SiC (1120) and (1100) substrate. The improvement of morphology could be obtained for (1120) and (1100) epilayers. Morphologies of (1120) epilayers were independent on off-orientations, Morphologies of (1100) epilayers were very sensitive to the off-orientations. The quality of epilayer, and impurity incorporation for a-plane were very influenced by the surface treatment before CVD growth compared to (0001) epilayers.

An intrinsic defect spectrum, commonly observed after ion-implantation, electron, proton or neutron irradiation and even after SIMS measurements is investigated using photoluminescence techniques. The spectrum is associated with carbon related isoelec-tronic centers having a pseudodonor like behaviour. Vacancy-interstitial pair complexes are tentatively suggested as the defect centers responsible for this intrinsic spectrum.