The lattice deformation caused by 100 MeV Ti7+ ion irradiation in Si (100) has been studied using X-ray topographic techniques. An important finding is the appearance of a strain field perpendicular to the ion beam direction in the irradiated region well separated from the projected range of implanted ions. This in-plane strain extends in the bulk of the sample and is not merely confined to the surface. The implanted region has been found to experience an out of plane strain which is expected to be tensile in nature.

The structure of As implanted GaAs layers before and after annealing are described and the relation between the structural quality and carrier lifetime was determined. Subpicosecond carrier lifetimes were found already for as-implanted layers, and this value changes only slightly after annealing in the temperature range up to 600°C. Annealing of As-implanted layers leads to the growth of As precipitates with a similar orientation relationship as those observed in low-temperature MBE-grown GaAs layers. However, it is still not clear whether point defects created by implantation or the As precipitates are responsible for the short carrier lifetime.

The influence of implantation-induced non-stoichiometry on the electrical activation and depth distribution of Group IV (Ge and Sn) and VI (Se and Te) elements in InP has been investigated with a variety of analytical techniques. Electrical measurements indicate that P co-implantation can increase the electrical activation of the Group IV elements through reductions in amphoteric behaviour and dopant-defect complexes for Ge and Sn, respectively. The relative influence of P co-implantation increases as the dopant ion dose increases. Though others have demonstrated that co-implantation increases the electrical activation of Group II elements, similar observations were not apparent for Group VI elements, the latter attributed to the lack of Group VI element interstitial character.

Spectroscopic ellipsometry (SE) measurements were made during and after electron cyclotron resonance (ECR) etching of GaAs. The spectral range for ex situ measurements, 1.24–5 eV, included the E1, E1+A1 critical points. The Ej, Ei+Aj structure was red shifted by about 50 meV, and broadened, by etching with a mixture of methane, argon, and hydrogen. Exposure to a pure H2 plasma caused greater red shifting and broadening, while a pure Ar ECR plasma produced only a slight red shift. The red shift is consistent with an increase in lattice constant of the order of 1%, in the top 10-30 nm. Broadening is consistent with crystalline lattice damage.

The interaction between device technology and the control of defects has been strong since the first transistor. The rapid and unparalled development of this technology can be monitored by changes in device size and process complexity, or reciprocally, in defect density. In the future the emphasis on computation functionality will shift to imaging and learning. In addition high volume manufacturing will cast an emphasis on capital cost, yield, effluent control and safety. These foci require the development of new sensitive defect assessment tools, the modelling of complex defect systems and the understanding of defect properties on the atomic scale. We shall illustrate this interplay between technology and materials science by topics in ULSI circuits, silicon photovoltaics and silicon microphotonics. For ULSI the control of both bulk and surface defects is decisive. The physical chemistry at the silicon surface plays a key role in metal contamination. We shall discuss the use of RF-PCD for in-line monitoring and investigation of reaction kinetics. Silicon for low cost, photovoltaic applications confronts problems involving complex defect systems, but comparatively simple processes. The goal is to optimize growth and cell processing. The objective of silicon microphotonics is to establish an IC compatible process technology for integration of optical interconnection with silicon electronics. By building the first silicon-based LED operating at λ = 1.54 μm at room temperature it has been shown that erbium doping is a viable approach. Codoping with F or O largely enhances the light output. We will show a process simulator for the Si:Er:F system as an example for ligand field engineering.

We have investigated the role of heavy metals in causing visible pixel defects in Charge Coupled Device (CCD) image sensors. Using a technique we call dark current spectroscopy, we can probe for deep-level traps in the active areas of completed image sensors with a sensitivity of 1 × 109 traps/cm3 or better. Analysis of histograms of dark current images from these sensors shows that the presence of traps causes quantization in the dark current. Different metal traps have characteristic dark current generation rates that can identify the contaminant trap. By examining the temperature dependence of the dark current generation, we have calculated the energy levels and generation cross sections for gold, iron, nickel, and cobalt. Our results show the relationship of these traps to the “white spot” defects reported for image sensors.

Crystallographic defect related degradation in high density memory devices was investigated. The results indicate that the refresh time degradation and bit failure mechanism are directly related to the crystal originated defects generated during Czochralski crystal growth. Defects associated with vacancy aggregations are found to have a detrimental effect on the overall performance of memory devices. Other defects, such as oxide polyhedral precipitates, contribute to a high number of cumulative fail bits, particularly in the bottom section of the crystal.

Electrical properties of PIN photodiodes fabricated on the bonded silicon on insulator (SOI) wafers annealed at 900°C for 5 seconds were evaluated in order to investigate the effect of rapid thermal annealing (RTA) on SOI wafers. Traps in the SOI layers with different thicknesses (10,30,100 μm) were investigated using the deep level transient spectroscopy (DLTS) method. In the SOI layer with a thickness of 100 μm, a trap with deep energy level (about Ec-Et=0.55 eV) was observed and the concentration of the trap decreased from 5.0 × 1011 cm−3 to 1.5 × 1011 cm−3 by RTA. For PIN photodiodes on the 100 μm-thick SOI layer, the dark current decreased from 2 × 10−9 A to 6 × 10−10 A, and sensitivity uniformity for a 35 μmφ light spot and spectral responses were both improved by RTA. Lifetimes were obtained from open-circuit voltage (Voc) decay curves for 940 nm and 655 nm light, and they increased from 37 μs to 57 μs and from 47 μs to 62 μs, respectively, by RTA. For thinner SOI layers (thickness=10, 30 μm), PIN photodiodes have good uniformity and low dark current, and their characteristics were not changed by RTA.

In this study, we present characterization of Metal-Oxide-Semiconductor (MOS) capacitors fabricated on carbon (C14) implanted silicon substrates. Carbon was implanted at an energy of 50 keV with doses ranging from 1 × 1012 cm−2 to 4.1×1015 cm−2. Metal-Oxide-Silicon (MOS) capacitors were fabricated and used to determine the MOS capacitance-voltage (C-V) and capacitance-time (C-t) behavior. These measurements revealed a strong correlation between carrier lifetime and the carbon dose. Degradation in lifetime was observed for carbon dose levels as low as 4 × l012 cm−2. At carbon doses equal to and above 6.4 × l013 cm−2, extremely low generation lifetimes were obtained (∼ 10−7 sec). On the other hand, degradation in C-V characteristics was observed only for carbon doses above 2.7 × l014 cm−2. Below this dose, both flatband voltage and interface trap density of the carbon implanted samples were comparable to those of the monitors. Analysis of the samples by cross sectional transmission electron microscopy revealed the absence of extended defects even in samples with high carbon dose levels.

The intent of the present work is to analyze device degradation and reliability in terms of their microscopic origins. The base-emitter junction of the advanced, “double-poly”, self-aligned bipolar transistor contacts the SiO2 sidewall spacer. During normal circuit operation, the base-emitter junction experiences a reverse bias which as a stress in time degrades the current gain of the transistor. Both a decrease of the gain, as well as an increase in the noise are observed. The forward base current increase as a function of stress time follows △IB ∼ tn. We present evidence that the defects are occurring at the Si-Si02 interface from perimeter to area comparisons. The weak temperature dependence of the forward base current in degraded transistors shows that trap-assisted tunneling current through the Si-SiO2 interface states is involved. The random-telegraph-signals observed for the first time in a silicon bipolar transistor are a direct identification of damage at the Si-SiO2 interface. 2D simulation of the potential and field near the interface allows us to show that damage can be expected.

This paper presents a phenomenological approach for analysis of dislocations in a large-area device like a solar cell. A microscopic model of a dislocation is used to calculate the local effects of a dislocation on the dark and the illuminated characteristics of a p-n junction device. A statistical approach is then used to empirically arrive at the I-V characteristics of a small-area device with a uniform distribution of dislocations. Finally, these results are applied to develop a network model to determine the terminal characteristics of a large-area solar cell of a known spatial distribution of dislocations. We show that the performance of a solar cell is influenced not only by the density of dislocations but also by their spatial distribution; heavily dislocated regions exert a disproportionately large degradation effect on the device characteristics.

The resonant tunneling via nanoscale silicon particles embedded in an a-SiO2 matrix in a diode structure has revealed a range of intriguing observations such as extremely sharp peaks and steps and periodic oscillations in (conductance-voltage) G-V measurements. Recently we have discovered a drastic sharpening of the conductance peak with light. Phase measurements show that the effects of light may be understood by invoking the filling of charged traps.

Making a comparative study between MOSFET and polycrystalline silicon thin film transistor(poly-Si TFT) in applying the charge pumping method(CPM), the most distinctive difference was found in the relation of the charge pumping current(Icp) versus the gate pulse frequency. According to the conventional theory, Icp increases linearly with the gate pulse frequency. In poly-Si TFT, however, Icp shows complicated dependence on frequency. We modeled the frequency dependence of Icp in poly-Si TFT by considering the resistance of active poly-Si film. According to this model we can extract the parameters such as grain boundary trap density, substrate resistance, and capture cross section.

Multicrystalline silicon ingots of 55 cm × 55 cm cross section, 100 kg have been grown by the Heat Exchanger Method (HEM). Controlled growth features have been used to produce large grain size, vertically oriented grain boundaries, large areas of twins with low defect density and rejection of impurities to the top of the ingot. Ambient control has reduced C, N, and O concentration and minimized precipitates with no detectable metallic impurities. High performance solar cells have ben fabricated, and further improvements can be achieved by minimizing dislocation tangles and impurities in localized regions.

The reliability of high performance carbon and beryllium-doped heterojunction bipolar transistors (HBT’s) is investigated using a pulsed mode current stress. After the current stress, the collector current reduction (measured at a fixed Vbe) and the inverted collector current ratio change (measured at two different reverse Vbe biases) are used as measures of HBT degradation due to dopant acceptors migration. For carbon and beryllium doped HBT’s, degradation was found to be only significant beyond a threshold current density (Jth), showing that the carbon doped devices have a higher Jth than that of the Be-doped HBT's. Beyond the Jth, the device degradation is insensitive to the stress current density but depends on the total stress charge. As a result, the device degradation mechanisms of electric field assisted dopant and carrier recombination enhanced dopant migration can be distinguished under pulsed mode current stress.

In this study, we examined the performance of AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistors with varying channel layer thicknesses for indium mole fractions of 0.21 and 0.24. For both compositions, we find that there is an optimum channel thickness above which the device performance is impaired. As expected the effective critical thickness of the In0.2iGa0.79As layer is higher. Surprisingly, however, transmission electron microscopy of the device structures indicates that the device performance is not impaired by the presence of a linear array of misfit dislocations. In fact, the devices with highest performance have misfit dislocations indicating that defect engineering may lead to improved performance in these structures. Furthermore, we find that device structures with poor performance have misfit dislocations along both of the <110> directions. Triple axis x-ray diffraction provides a non-destructive estimate of the dislocation densities present.

We have investigated the electrical properties of n-GaAs epilayers grown by MBE on the top of L.T.GaAs .The Hall mobility and the channel depth of the epilayer decreases as the growth temperature of the buffer decreases. The degradation of the electrical properties is attributed to the outdiffusion of precipitates and point defects from the L.T. buffer layer. The use of intermediate layers (GaAs grown at 400°C-600°C and GaAs/AlxGa1-xAs (x=0.5, 1) superlattices ) between L.T. buffer and n-GaAs active layers in MESFET devices improves the Hall mobility of the channel, the gm and fT performance of the devices.This improvement has been attributed to the AlGaAs layer which hinders the defects outdiffusion.

In the fabrication of mercuric iodide (HgI2) room temperature radiation detectors, as in any semiconductor process, the quality of the final device is very sensitive to the impurities and defects present. Each process step can change the effects of existing defects, reduce the number of defects, or introduce new defects. In HgI2 detectors these defects act as trapping and recombination centers, thereby degrading immediate performance and leading to unstable devices. In this work we characterized some of the defects believed to strongly affect detector operation. Specifically, we studied impurities that are known to be present in typical HgI2 materials. Leakage current measurements were used to study the introduction and characteristics of these impurities, as such experiments reveal the mobile nature of these defects. In particular, we found that copper, which acts as a hole trap, introduces a positively charged center that diffuses and drifts readily in typical device environments. These measurements suggest that Cu, and related impurities like silver, may be one of the leading causes of HgI2 detector failures.

Evidence of room-temperature infrared electroluminescence from thin-film polycrystalline CuInxGa1-xSe2-based diodes (0<×<0.4) has been observed by Fourier transform spectroscopy using a FT-Raman spectrophotometer that operates in the near-infrared spectral region. Electroluminescence spectra from ternary CuInSe2 and quaternary Cu(In,Ga)Se2 device structures are reported. In all electroluminescence cases we observe an approximate linear relationship of intensity to forward junction current. Film fabrication process determines to a great extent the optoelectronic properties of the emitters, and consequently, the characteristics of their luminescence spectra. Using a Gaussian multi-peak curve-fit routine to analyze electroluminescence spectra, we can deduce the position, width and relative intensity of the dominant optical transitions. Our purpose in this contribution is two-fold: (1) To report the room-temperature electroluminescence phenomena from chalcopyrite Cu(In,Ga)Se2 polycrystalline thin-films, and (2) to demonstrate electroluminescence as a viable technique to optically characterize Cu(In,Ga)Se2 materials using diode structures at RT.