Semiconductor technology is the key point of the information society. However, as technology developing, the traditional semiconductor material such as silicon (Si) could not meet the demand of the society. Therefore, the next generation semiconductor material silicon carbide (SiC) is widely concerned. Compared to Si, SiC has some superior physical and chemical properties. On the other hand, it is difficult to polish SiC wafers due to the chemical, mechanical, and thermal stability. To achieve high-efficient CMP processing of SiC substrates, oxygen gas was introduced which might increase removal rates. MnO2 slurry was selected instead of silica slurry and strong oxidant KMnO4 was used to improve SiC-CMP process as an additive. In this paper, the effect of oxidant was inspected first. Meanwhile, we carried out the CMP experiment with the new type CMP machine to control the processing atmospheres including types of gases and gas pressures. As conclusions, oxygen and high atmospheric pressure can increase the removal rate in MnO2 slurry. KMnO4 additive has a great effect on increase of the removal rate. One of additional interesting results is that there seems to be the optimum mixture ratio of N2 and O2 gases to achieve a higher removal rate of SiC wafer.

Metal CMP applications necessitate the formation of a protective oxide film in the presence of surface active agents, oxidizers, pH regulators and other chemicals to achieve global planarization. Formation and mechanical properties of the chemically modified metal oxide thin films in CMP determine the stresses develop at the interfaces delineating the stability and protective nature of the chemically altered films on the surface of the metal wafer. The balance between the stresses built in the film structure versus the mechanical actions provided during the process can be used to optimize the process variables and furthermore help define new planarization techniques for the next generation microelectronic device manufacturing. In this study, the preliminary studies were concentrated on the very well established tungsten CMP applications and furthermore, titanium CMP applications were presented as a part of surface nano-structuring methodology for biomedical applications by stressing the synergistic effect of protective metal oxide film of titanium in this advanced application.

Most of polishing conditions are not consistent during the polishing process such as pressure, velocity, temperature, pad surface asperity and slurry flow which determine the CMP performance. Traditionally, these parameters are detected by various monitoring methods on CMP polisher. This study introduces a new concept of intelligent pad system with multiple sensors and peripheral devices such as memory, CPU, battery, transmitter and so on. The main functions of the intelligent pad are sensing the change of major parameters and data processing in real-time during the polishing process. The developed intelligent pad has nine points of embedded pressure sensor and makes data processing, saving, and transmitting in real-time. Experimentally, the intelligent pad system was evaluated to understand carrier behavior and pressure distribution. Finally, the analysis of pressure distribution using the intelligent pad turned out a useful method to understand the polishing head behavior and the polishing profile.

In this study, slurry formulations in the presence of self-assembled surfactant structures were investigated for Ge/SiO2 CMP applications in the absence and presence of oxidizers. Both anionic (sodium dodecyl sulfate-SDS) and cationic (cetyl trimethyl ammonium bromide-C12TAB) micelles were used in the slurry formulations as a function of pH and oxidizer concentration. CMP performances of Ge and SiO2 wafers were evaluated in terms of material removal rates, selectivity and surface quality. The material removal rate responses were also assessed through AFM wear rate tests to obtain a faster response for preliminary analyses. The surfactant adsorption characteristics were studied through surface wettability responses of the Ge and SiO2 wafers through contact angle measurements. It was observed that the self-assembled surfactant structures can help obtain selectivity on the silica/germanium system at low concentrations of the oxidizer in the slurry.

Additive-abrasive interactions in chemical-mechanical planarization (CMP) slurries are investigated using fluorescence correlation spectroscopy (FCS). The FCS technique provides quantitative determinations of the interaction between additives and abrasive particles by characterizing the competitive adsorption of the additive and a fluorescent probe molecule by an abrasive particle. Adsorption of the CMP additives glycine and benzotriazole (BTA) on precipitated and sol-gel colloidal silica abrasives are characterized. Significant differences in the fluorescent probe’s adsorption to the different silica abrasives in the presence of the additives suggest surface chemistry differences between the different types of silica. Extensions of the analysis of FCS data are proposed for improving the quantitative determination of the competitive adsorption of fluorescent probe dyes and CMP additives on abrasive particles.

Fabrication of integrated circuits is a multi-step process that involves chemical mechanical polishing (CMP) for planarizing the deposited layers. Although dependent on the consumables and machine operating conditions, most CMP researchers assume that the polishing occurs in the mixedlubrication regime, where the applied load on the wafer is supported by the hydrodynamic slurry pressure and the contact stress generated during the pad-wafer contact. The particle augmented mixed lubrication (PAML) approach has been employed by Terrell and Higgs (2009) as a high-fidelity asperity-scale mixed-lubrication CMP model. The current work introduces a more computationally efficient wafer-scale PAML model, called PAML-lite, which employs a two-dimensional average flow Reynold's Equation incorporating spatial dependence of entrainment velocities to model the hydrodynamic pressure. The contact mechanics are modeled using a Winkler elastic foundation in cylindrical polar coordinates. The resulting slurry hydrodynamic pressure distribution and contact stress are used to determine the equilibrium configuration of the system in the form of a nominal clearance and rolling and pitch angles. Local and wafer scale material removal rate (MRR) is predicted by assuming a uniform distribution of particle sizes. The prediction of PAML-lite were then benchmarked against experimental results. Upon verification, parametric studies were conducted to understand the effect of some unexplored CMP parameters.

In this paper, a novel set of macros with line/space width from 128nm/128nm, 64nm/64nm to 32nm/32nm was designed and installed on 20nm technology-node hardware. The pitch-dependent pad erosion post Cu CMP was studied by atomic-force microscopy (AFM), scanning electron microscopy (SEM) and transmission electron microscopy (TEM) quantitatively on these macros. Two methods were investigated to reduce the difference between pitch- and density-induced CMP non-uniformity. The first is using new scheme of partial Cu plating process followed by SiCNH insulator deposition and then CMP. The second is through the selection of slurries and pads. Both results are discussed in this paper.

Most chemical mechanical polishing (CMP) researchers assume that the polishing occurs in the mixed-lubrication regime, where the applied load on the wafer is supported by the hydrodynamic slurry pressure and the contact stress generated during the pad-wafer contact. Consequently, the particle augmented mixed lubrication (PAML) approach has been employed as an extremely high-fidelity asperity-scale mixed-lubrication CMP model in the past. Recently, a more computationally efficient PAML approach, PAML-lite, which considers the slurry’s fluid and particle dynamics, the pad/wafer contact mechanics, and the resulting material removal, was introduced. The current work presents the PAML-lite framework with the isothermal assumption relaxed. As a result, wafer-scale interfacial temperatures during CMP can be predicted by considering asperity heating and dissipation of the heat into the solid and fluid media in the sliding contact.

A new multiphysics, multiscale framework is presented which is capable of capturing and predicting both wafer-scale and feature-scale defects. Through physics-based modeling, the empirical wear/Preston coefficient often found in popular feature scale models has been eliminated. Simulation results show the topography evolution of an actual metal 1 layout between two dies located in different positions on a wafer during the CMP process.

The “pad-in-a-bottle” (PIB) approach to planarization is a non-traditional chemical mechanical polishing (CMP) process in which slurry containing polymer beads is used. The approach is hypothesized to be able to perform polishing by mixing polymer beads with similar chemical and mechanical properties as pad asperities into the slurry to provide force application and polishing contacts, so that a traditional CMP pad is not needed. Pad-in-a-bottle could provide predictable and controllable mechanical contacts through bead size control, which could substantially reduce process variability. Pad-in-a-bottle also has the potential to reduce the CMP consumable cost. In this work, we propose a physical model to understand the behavior of the pad-in-a-bottle approach and estimate the relationship of applied pressure and material removal rate in this variant of CMP. Two specific cases of polymer bead formation are considered in our modeling work, bead packing and bead stacking. Model prediction shows that the two bead formation cases generate distinctly different polishing mechanisms: material removal is applied pressure driven in bead packing, but contact event driven in bead stacking. The physical model suggests that in future experiments or applications of pad-in-a-bottle, a polymer bead size distribution or shape variation may be needed to achieve efficient material removal.

The motivation of this study is to provide answers to questions rising with 3D stacking of semiconductor chips. This includes the development and validation of concepts for 1) Through Silicon Via (TSV) formation, 2) metal layer build-up, 3) various types of assembly and packaging concepts and methods, as well as 4) process characterization.

The investigations discussed here have been conducted on test wafer (ATEC2) developed by Fraunhofer IZM-ASSID. This design contains dedicated test structures which have been implemented to enable different unit processes and allows easy physical analysis. One of those test structures has been used to study the impact of the TSV density on the stress generation after TSV fill, anneal and CMP (chemical mechanical planarization) including copper protrusion and planarization behaviour. First results of the interaction between different TSV plating bath chemicals, anneal procedures and wafer bow obtained using test wafer ATEC1 were already presented during ICPT 2011.

The process flow applied in this investigation was (1) TSV filling by electro-plating, (2) anneal, and (3) CMP. Physical analysis including inline metrology has been conducted between all process steps.

The test wafers processed were divided into two groups according to the utilized copper plating bath chemistries. The copper TSV metallization was carried out by electro-chemical deposition in plating bath chemicals from two different suppliers. 3D microscope inspection was conducted for surface analysis. After TSV filling the copper surface shows protrusion on top of the TSVs and ring-shaped non-uniformities around the filled TSV. These structures were analysed after each step of the process flow.

An anneal process was conducted after TSV plating. The annealing temperature was varied to investigate its influence on the material properties (protrusion caused by copper recrystallization) and the dip behaviour. The experiments were accomplished at 250 degree Celsius and above.

Afterwards all test samples were processed by CMP with different selective slurries and analysed by AFM (atomic force microscopy) and optical methods. Bow and warpage measurements of the test wafers taken after each process step have been analysed.

Our investigation has demonstrated the influence of the additives on the behaviour of different plating bath chemistries during temperature treatment (copper recrystallization) and therefore also the planarization behaviour after CMP.

Progress and challenges for chemical mechanical polishing (CMP) of GaN are discussed in detail by focusing on the importance of GaN surface oxidation during CMP. We report on the significant difference in the removal rates between Ga2O3 and GaN, suggesting that the surface oxidation reaction is the rate-limiting step for CMP of Ga-faced GaN. This is actually proved by the fact that ex-situ surface oxidation by annealing in air prior to CMP exhibits a marked reduction in the required CMP time to produce a damage-free surface. As a future challenge, we outline two of our recent developments, ultraviolet-assisted CMP and atmosphere-controlled CMP, that enable in-situ oxidation, since ex-situ oxidation must be modified to in-situ to further advance CMP.

Aluminum (Al) gate fill has been implemented in Replacement Metal Gate (RMG) due to its low resistivity. Titanium (Ti) has been widely used as wetting layer for Al to fill the gates. For low resistance gate fill in structures with small feature size and high aspect ratio, Ti-Al metal fill becomes increasingly more challenging as we move from 20nm into 14nm FinFET and 3D type structures.

Cobalt (Co) is a good wetting film for Al with better fill performance and lower resistance than Ti-Al based process. However, due to the difference in corrosion potential between Al and Co, Chemical Mechanical Planarization (CMP) creates pitting type defects on Al-Co film that increases resistance variability across pattern density. CMP induced corrosion is separated in two parts; first is the static Co corrosion happened in the acidic chemical environment in the Al slurry. Second is the galvanic corrosion from Co-Al metal boundary due to high metal electrical potential. Static corrosion can be resolved by adding a Co corrosion inhibitor in the slurry formulation1. Galvanic corrosion can be minimized by controlling Co thickness deposition and formation of complete intermetallic phase. By controlling the removal rate with respect to corrosion rate we were able to suppress corrosion significantly.

We looked into compositions where the corrosion potential (Ecorr) gap between Al and Co is reduced to ≤10mV leading to reduced galvanic currents. Stabilization of the corrosion currents in both Al and Co was observed using potentiodynamic scans. The effect of pH, several oxidizers and additives on the open circuit potentials (Eoc) of Al and Co was investigated and it was found that solutions of KMnO4, saccharides and sulfonate group containing compounds help reduce the Ecorr gap in between Al and Co to ∼10 mV.

Controlling the Al gate height across pattern densities and gate lengths to within few nm is another challenge for Al CMP. The industry widely used approach is to clear all Al using a slurry with high selectivity to dielectric, followed by a CMP step using a non-selective Al-to-oxide slurry. Both polishing steps need to be optimized in parallel in order to remove the incoming spacer SiN divot, minimize Al loss on gates with high pattern density or long gate length, minimize oxide loss on large open areas while maintaining low defectivity.

In this paper we are presenting an innovate Al CMP process that demonstrated low gate resistance with tight distribution up to 80% pattern density. This work has been supported by the independent Bulk CMOS and SOI technology development projects at the IBM Microelectronics Division Semiconductor Research & Development Center, Hopewell Junction, NY 12533.