A new class of compact rectangular waveguide filters is proposed in this paper. The key element is a square ridge resonator realized within a rectangular waveguide supporting the fundamental TE10 mode. The square ridge can support two modes resonating along orthogonal directions in the gap between the ridge and the opposite waveguide wall. This structure enables dual-mode degeneracy without the need of oversized cavities, thus allowing for considerable size reduction with respect to the conventional dual-mode implementations. Different filter structures employing one or more ridges within short waveguide sections are proposed as attractive solutions for pseudo-elliptic band-pass or dual-band filters. The experimental results of a manufactured fourth-order pseudo-elliptic pass-band filter validate the feasibility of the proposed class of filters.

In this contribution, fundamental design considerations for a novel metallization technique to realize millimeter-wave microstrip structures are presented. This hot embossing technology is a fast and economic process originating from the production of three-dimensional molded interconnect devices. Conductive structures are coated onto plastic parts or plastic foils using a heated stamp. This approach shows high potential and therefore will be investigated for the fabrication of low-cost printed antennas at millimeter-wave frequencies. The focus of this contribution is on design guidelines considering process parameters and interactions with substrate and copper foil characteristics derived from the fabrication and measurement of single microstrip patch antenna prototypes for radar applications in the industrial, scientific and medical (ISM) band at 24 GHz. Far-reaching potential lies in the utilization of the three-dimensional manufacturing technology for the construction of conformal integrated antenna systems based on the thermoforming capabilities of polymer substrates.

In this paper, different techniques are combined in a unique characterization system dedicated to power transistor linearity improvement. Successive optimizations are performed using source-pull/load-pull techniques at fundamental, harmonic, and base-band frequencies associated with an instantaneous memoryless base-band predistortion procedure. Measurement results performed at 1.575 GHz on a metal semiconductor field effect transistor (MESFET) power device biased in class-AB under a quadrature phase shift keying (QPSK)-modulated signal excitation show that fundamental frequency load-pull increases the output power and power-added efficiency (PAE) by 2 dB and 16 percentage points, respectively. The fundamental frequency source-pull measurements lead to an adjacent channel power ratio (ACPR) variation equal to 3 dB. For harmonic load-pull (at 2f0), it has been found that some impedances greatly improve linearity but output power and PAE decrease. Source-pull characterization at the second harmonic frequency allows one to find a trade-off between output power, efficiency, and linearity. Moreover, the influence of base-band impedance on ACPR and error vector magnitude (EVM) is found to be 15 dB and 5.5 percentage points, respectively. Finally, instantaneous memoryless base-band predistortion improves ACPR and EVM values by 5 dB and 1 point, respectively.

This paper presents a technique that enables both efficiency and linearity enhancements of power amplifiers (PA) used in communication systems. It consists in the implementation of a dynamic bias control combined with digital base-band predistortion. The aim of this paper is to describe a methodology and successive steps of the design procedure to reach optimum performances in terms of power added efficiency (PAE) and linearity. It is here applied to a 100 W wide-band lateral diffused metal oxide semiconductor (LDMOS) push–pull amplifier (50–500 MHz) driven by orthogonal frequency division multiplexing (OFDM) signals. When the amplifier is driven by a continuous wave (CW) signal and operates at a constant 28 V drain bias voltage, it exhibits 100 W output power and 60% PAE. When it is driven by an OFDM signal, a 10 dB output power back-off is necessary to have a −25 dBc adjacent channel power ratio (ACPR) and PAE decreases down to 10%. By properly implementing an envelope tracking bias system, 40 W output power along with 38% PAE and −27 dBc ACPR have been reached. Applying base-band digital predistortion provides additional linearity improvements at high PAE (for only one point PAE lost, a 5 dB improvement is obtained for ACPR).

This paper presents switched sequential amplifiers (SSAs) using reconfigurable directional couplers as power splitters and combiners. The SSA concept allows matching the efficiency characteristics to the amplitude probability density distribution of the applied modulated signal. Therefore the back-off efficiency can be increased significantly. A three-channel SSA can e.g. theoretically achieve a −10 dB back-off efficiency exceeding 50%. Design parameters and potential efficiency enhancement are discussed for two- and three-channel SSAs. After a brief introduction of the used switched couplers, the circuit concept for two- and three-channel SSAs is described. Calculations for the possible efficiency enhancement are presented. Also signal distortions by the directional couplers are outlined. The paper closes with experimental results for a two-channel SSA.

The silicon vertical MOSFET RF power amplifier described in this paper is the industry’s first to utilize high-voltage vertical technology. Operating under pulse conditions of 200 µs pulse width and 10% duty cycle, it delivers more than 100 W of peak power. Operating in Class AB with only 50 mA of bias current the device achieves more than 20 dB of gain and 47% power added efficiency at P1dB compression across 200 MHz of bandwidth at L-band from 1.2 to 1.4 GHz. The DC characteristics include a BVdss of 95 V enabling high-voltage operation with a 48 V power supply. The device is inherently rugged and withstands mismatch tolerances of 20:1 voltage standing wave ratio over all phase angles at full rated power and with 3 dB of input power over-drive and 10% greater than nominal voltage.

An L-band frequency and rejection-level tunable SiGe HBT differential amplifier with dual stopband is presented. To achieve frequency and rejection-level tunable performance, dual LCR-tank circuit with an active load is incorporated into the design of the series feedback loops of the differential amplifier. The active load consists of a varactor diode represented as a variable C and a common-emitter transistor represented as a variable R. The frequency and rejection level can be tuned independently by controlling a cathode bias voltage of the varactor diode or a base bias voltage of the transistor. The implemented 0.35 μm SiGe HBT amplifier with dual stopband demonstrates a frequency tuning of 0.53–1.16 GHz and a rejection-level variation up to 9.5 dB. The input and output return losses are better than 17.5 and 11 dB over 0.2–1.5 GHz, respectively. The measured P1dB is+3 dBm and IIP3 is 0 dBm with Vcc = 6 V and Ic = 8 mA.

This paper reports an investigation and a proposed solution to design Class E power amplifiers above the theoretical maximum frequency allowed by the adopted active device. Starting from the traditional time domain analysis, a numerical algorithm has been developed and presented in order to extend Class E feasibility through the optimization of the output voltage waveform. A hybrid Class E amplifier in laterally diffused metal oxide semiconductor (LDMOS) technology has been designed and measured. The final amplifier shows an output power of more than 10 W with an associated efficiency of 49% (power added efficiency (PAE) = 45%) over a 100-MHz bandwidth around 2.14 GHz.

The use of 130-nm CMOS for power amplifiers at 20 GHz is explored through a set of power amplifiers as well as transistor level measurements. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, and the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor-level characterization using load pull measurements on 1-mm gate width transistors yielded 148-mW/mm output power. Transistor modeling and layout for power amplifiers are also discussed. An estimate on the maximum achievable output at 20 GHz from 130-nm CMOS power amplifiers, based on findings in this paper and the literature, is finally presented.

The rate of signal transmission on or between monolithic integrated circuits is limited by the cross-talk and the dispersion due to the wired interconnects. The bandwidth limitations can be overcome by wireless chip-to-chip and on-chip interconnects via integrated antennas. In this work the utilization of the electronic circuit ground planes as radiating elements for the integrated antennas has been proposed. This allows for optimal usage of chip area, as the antennas share the same metallization structure as the circuits. By exciting the interconnects between the patch areas in transmission line modes as well as in antenna modes, the interference between signals from circuit to circuit and antenna excitation signals is minimized. This has been achieved by inserting a transformer in the antenna feeding network. Examples of possible antenna and feeding structures have been investigated numerically. Scaled prototypes of the integrated antennas have been manufactured and measured.

This paper presents a new planar particle that shows negative effective permittivity under irradiation by an electromagnetic wave. The mutual coupling between the couples of these particles is studied in particular. The response of this particle sensitive to an electric field is strongly anisotropic. The particle is aimed to be used to compose an isotropic epsilon-negative metamaterial in two forms. First, a unit cell of the metamaterial consists of a cube bearing six particles on its faces, located with specific orientations. The experiments showed that this unit cell is suitable for manufacturing an isotropic epsilon-negative metamaterial obtained by arranging these cells in a 3D cubic periodic system. The second form of an epsilon-negative metamaterial with an isotropic response consists of the planar particles themselves, distributed quasi-randomly, composing a 2D system and/or of particles placed in spherical shells and distributed fully randomly in a hosting material forming a 3D system. The isotropy of these systems was verified by measurements in a rectangular waveguide.

Metamaterial transmission lines can be realized as a combination of right- and left-handed transmission line (TL) sections exhibiting positive and negative dispersion. This approach gives additional degrees of freedom for improving the performance of microwave devices. Artificial right- and left-handed sections, which are based on lumped-element unit cells consisting of inductance and capacitances (LC-cells), are used. This makes it possible to decrease dimensions of the devices drastically. Furthermore, using variable capacitors in LC-cells allows designing tunable devices. This paper presents the results of design, numerical simulation, and experimental investigation of a tunable rat-race ring and free-of-spurious response dual-band filter manufactured as integrated ceramic multilayer circuits based on low-temperature co-fired ceramics. Commercial semiconductor varactors have been used as tunable components.

A fast, yet unconditionally stable, solution of time-domain electric field integral equations (TD EFIE) pertinent to the scattering analysis of uniformly meshed and/or periodic conducting structures is introduced. A one-dimensional discrete fast Fourier transform (FFT)-based algorithm is proffered to expedite the calculation of the recursive spatial convolution products of the Toeplitz–block–Toeplitz retarded interaction matrices in a new marching-without-time-variable scheme. Additional saving owing to the system periodicity is concatenated with the Toeplitz properties due to the uniform discretization in multi-level sense. The total computational cost and storage requirements of the proposed method scale as O(Nt2Nslog Ns) and O(Nt Ns), respectively, as opposed to O(Nt2Ns2) and O(NtNs2) for classical marching-on-in-order methods, where Nt and Ns are the number of temporal and spatial unknowns, respectively. Simulation results for arrays of plate-like and cylindrical scatterers demonstrate the accuracy and efficiency of the technique.

This work presents the design, fabrication, and test of X-band and 2–18 GHz wideband high-power single pole double throw (SPDT) monolithic microwave integrated circuit (MMIC) switches in microstrip gallium nitride (GaN) technology. Such switches have demonstrated state-of-the-art performances and RF fabrication yields better than 65%. In particular, the X-band switch exhibits 1 dB insertion loss, better than 37 dB isolation, and a power handling capability better than 39 dBm at a 1 dB insertion loss compression point; the wideband switch shows an insertion loss lower than 2.2 dB, better than 25 dB isolation, and an insertion loss compression of 1 dB at an input drive higher than 38.5 dBm in the entire bandwidth.

In millimeter-wave CMOS circuits, a balun is useful for connecting off-chip single-end devices and on-chip differential circuits to improve noise immunity. However, an on-chip balun occupies a large chip area. To reduce the chip area required for the on-chip balun, a new rat-race balun using a rewiring technology with a wafer-level chip-size package (W-CSP) is proposed. The W-CSP balun occupies no area in a die because it is placed over integrated circuits. In the proposed balun, an S-shaped structure is adopted in order to directly connect the balun to differential GSGSG pads on a chip with a small area. The S-shaped W-CSP balun was fabricated on a silicon-on-insulator (SOI) substrate. The core area of the S-shaped rat-race balun is 480×735 µm, which is 22.4% that of a square rat-race balun. As a result of measurement, we found that the minimum insertion loss is 1.4 dB and the operating frequency ranges from 40 to 61 GHz.

Orthogonal frequency division multiplexing (OFDM) waveforms offer strong advantages for integrated communication and radar systems. However, they exhibit inherent high-range sidelobes after matched filtering when standard communication constellation symbols are used for the coding of the carriers. Consequently, they require filtering at the receiver that can serve for sidelobe suppression in order to avoid target masking. However, unmasking is not the only concern; it is crucial to evaluate the filtering scheme both in terms of sidelobe suppression capability and in terms of output signal-to-noise ratio. This last criterion is essential when aiming at also detecting weaker reflections. In this paper the theoretical performance of the reiterated filtering technique based on linear minimum mean square error (LMMSE) is derived and compared to the matched filter. The unmasking capabilities are relevant, but also output power figures. Complex-valued filter output peaks are also evaluated and compared to the matched filter output peaks. Moreover, the performance of reiterated LMMSE is evaluated for OFDM communication-encoded radar waveforms.

The design of a subharmonic downconverter for 94-GHz imaging arrays in SiGe:C technology is presented. A three-stage differential low-noise amplifier (LNA) with lumped matching networks is used together with a subharmonic mixer driven by a single-pole local-oscillator poly-phase network to form the front-end. The LNA yields 15 dB gain at 94 GHz, while the mixer provides 5 dB conversion gain over a 10 GHz IF bandwidth. The integrated downconverter provides 20 dB conversion gain at 94 GHz with an input 1-dB compression point of −31 dBm and has a current consumption of 45 mA at a 3.3 V supply voltage. The total required die area of the complete downconverter (excluding pad frame) is 0.1 mm, thus making it particularly suitable as a front-end in multi-channel receiver systems.

Low-cost enabling technologies for T/R modules (TRMs) in phased array radars are proposed and analyzed in terms of technology, performance, and cost aspects. Phase and amplitude controlling integrated circuits (ICs) realized in a low-cost standard silicon process are demonstrated. The design of several ICs at the S-, C-, on X-band has shown that silicon germanium is a strong contender for gallium arsenide. This also applies to TRMs suited for military active phased array antenna (AESA) radars. The circuits presented in this paper are manufactured by austriamicrosystems in their 0.35 µm SiGe-BiCMOS process with an fT of around 70 GHz. A TRM packaging concept based on soldered surface-mount technology and organic substrates is also demonstrated. A cost analysis concludes that by using the proposed packaging concept and the SiGe core-chip technology, the TRM production cost can be potentially reduced by 70% compared to traditional ceramic hermetic packaging with core chip in GaAs technology.

An effective linearization technique capable of equalizing IM3 products resulting from an arbitrary out-of-band blocking scenario in a wideband direct conversion receiver is presented. IM3 products are regenerated in the RF analog domain of a low-power mixed-signal feedforward path and are used to cancel analogous signal terms in the original receiver at digital baseband via adaptive equalization. The composite SAW-less receiver achieves an improvement in effective IIP3 from −7.1 to +5.3 dBm under worst-case UMTS Region 1 blocking when the feedforward path is active.