The material and electrical characteristics of silicon dielectric films prepared via Rapid Thermal Processing (RTP) are described. A commercial RTP system with heat provided by tungsten-halogen lamps was used. Silicon dioxide films were grown in pure oxygen and in oxygen with 4% hydrogen chloride ambients. As grown films were either annealed in a nitrogen ambient or nitrided in an ammonia ambient. Film thickness ranges from 4 to 70 nm for RTP times from 0 to 300 s at 1150 C. Current-voltage and capacitance-voltage methods were used for electrical characteristics. Ellipsometry, Auger and TEM were used for material characterization.

A comprehensive review is presented of the use of transient thermal processing for the activation of implanted dopants, the alloying of ohmic contacts, the pulse diffusion of Zn for p+ contacts, and other heat treatments of GaAs. In all cases, transient processing produces results at least as good as furnace heating, and in some instances, markedly better. The special needs of GaAs, such as encapsulation of the wafer surface, and prevention of slip and warpage are discussed, as well as recent results detailing implant damage removal processes during transient annealing.

The removal of lattice damage and consequent activation by rapid thermal annealing of implanted Si, Se, Zn and Be in GaAs was investigated by capacitance-voltage profiling, Hall measurements, transmission electron microscopy (TEM), secondary ion mass spectrometry and Rutherford backscattering. The lighter species show optimum electrical characteristics at lower annealing temperatures (˜850°C for Be, ˜950°C for Si) than the heavier species (˜900°C for Zn, ˜1000°C for Se), consistent with the amount of lattice damage remaining after annealing. TEM reveals the formation of high densities (107 cm−2) of dislocation loops after 800°C, 3s anneals of high dose (1×1015 cm−2) implanted GaAs, which are gradually reduced in density after higher temperatures anneals (˜1000°C). The remaining loops do not appear to effect the electrical activation or carrier mobility in the implanted layer, the latter being comparable to bulk values.

Solid phase epitaxial (SPE) growth of ion implanted GaAs layers has been studied using the time resolved reflectivity technique. A series of implanted impurities have been selected to study the dependance of the nature of the impurity on the growth kinetics. It has been found that the activation energy and the kinetics of growth were independant on the choice of implanted substitutional impurity. Only impurities such as Argon were responsible of a large decrease in the regrowth rate. The same technique is shown to bring informations on the amorphous-crystal interface structure during growth. From these informations it has been possible to show that interface roughening occured during SPE in (100) GaAs. This interface evolution is an intrinsic property of the implanted GaAs material.

Scanning microwave photoconductance, capacitance-voltage profiling and Hall effect measurements were used to investigate the uniformity of activation of Si, Be and Mg implanted 2″ and 3″ diameter, semi-insulating GaAs substrates after rapid thermal annealing in a commercial furnace. The results indicate that carrier lifetimes and mobilities for low dose (3−4 × 1012 cm−2) implants and carrier densities for high dose (1× 1015 cm−2) implants are comparable or superior in rapidly annealed substrates to those obtained in thermally annealed implanted layers. The uniformity of these parameters is not significantly different for wafers annealed by either method. The temperature dependence of damage removal and carrier activation in the implanted regions during both furnace and transient annealing was also investigated, and demonstrates that the microwave photoconductance technique gives results for donor implantation correlating well with conventional backscattering and electrical measurements respectively.

Rapid thermal annealing (RTA) is used to form shallow and heavily-doped contact regions in undoped, semi-insulating GaAs. These layers are formed by using a high-intensity tungstenhalogen lamp to diffuse germanium and selenium from a deposited GeSe thin-film. RTA reduces surface degradation and permits better control of the diffusion profile than conventional furnace annealing. Optimal 20-second RTA occurs above a diffusion threshold at 950°C but below the failure of the SiO2 encapsulant at 1100°C. The n+ regions created have peak impurity concentrations over 1020/cm3 at depths under 750 Å with sheet resistances less than 60 Ω/▩. Non-alloyed ohmic contacts exhibit specific contact resistivites of 2.2 × 10−4 Ω · cm−2.

The effects of implanting Se+ ions through Si N4 layers have been compared with implants into uncapped GaAs. Through nitride implants have a higher residual damage, lower carrier concentration and lower mobility following rapid thermal annealing between 850 and 975 °C. The effect is believed to be due to the interface strain between the encapsulant and the amorphous GaAs.

An Eaton Nova Rapid Optical Annealer (ROA 400) has been used to activate n and n+ Si implants for use in power and low noise FET structures for GaAs MMIC's. PECVD SiN capped 3" SI GaAs wafers were annealed at temperatures ranging from 800 to 970 °C for times ranging from 0 (transient light pulse) to 20 sec. Doping profiles were determined using a Polaron concentration profiler; FATFET's were used for measuring drift mobility; and short gate (l.0μm gate length) FET's were fabricated to establish activation uniformity and to determine d.c. and r.f. performance. Results have indicated peak implant activation as high as 90% and electron mobilities of up to 4700cm2/V-sec for carrier concentrations of 1.3×1017/cm3 – results comparable to conventional furnace annealing. The most significant improvement of optical annealing comes in device uniformity. Saturated current uniformities of < ±3% have been achieved over 3" wafers with excellent reproducibility from wafer to wafer. Power FET structures with zero bias gm of 120mS/mm with uniformities of <±5mS/mm have been measured. R.f. measurements on these devices yielded output powers of >500mW/mm with power added efficiencies as high as 35%.

Rapid thermal annealing (RTA) techniques have been developed to activate shallow, high dose implants in InGaAs. Activation of deep, multiple energy high dose beryllium implants was also investigated. Two-step RTA cycles which peaked at a high temperature momentarily and then held at a lower temperature for 3 to 10 seconds were used to activate the implanted dopants. Over 80% activation was achieved. The results are superior to furnace anneal results, and at least comparable to graphite strip heater results. Increasing the anneal temperature on higher dose implants, however, type conversion was observed when the peak temperature exceeded a certain value.

For the first time a combination of titanium disilicide and rapid thermal processing has been used to produce a high temperature stable gate on gallium arsenide. A barrier height of 0.79 V with an ideality factor of 1.02 has been obtained after annealing up to 800°C, and useful results are found up to 900°C. Auger analysis shows little intermixing of the silicide with the underlying substrate, which is not the case for conventional annealing. The advantages of titanium disilicide over the more commonly used tungsten silicide with regard to film resistivity and stress will be discussed. A self-aligned gate MESFET (SAGFET) process has been developed using TiSi2 as the gate material.

In this paper, we report a multi-step rapid thermal annealing process for microwave discrete devices and monolithic integrated circuits fabrication. 2” diameter undoped liquid encapsulated Czochralski GaAs wafers were implanted with 29 Si+ and annealed without capping using incoherent light from high intensity halogen lamps. The annealing was carried out in multiple temperature steps to achieve optimum damage removal and dopant activation. As a result, wafers implanted with mid 1012 cm−2 dose exhibited 85–90% activation efficiency for 100kV implant and nearly 100% activation for 300 kV implant. In comparison with single-stepannealed wafers, multi-step-annealed wafers showed not only higher activation efficiency, but also more uniform activation, higher electron mobility and better device performance.

This paper presents a study of the annealing of Be and Si implants into InP. It compares rapid thermal anneal (RTA) and furnace anneal (FA) techniques over a temperature range of 600-;900° C. The results demonstrate that RTA results in activation and mobilities as good as those obtained by FA for both Si and Be implant. The background Fe concentration of S.I. InP substrates lead to substantial differences in activation. Arrhenius fit of optimal activation data of Si indicates an activation energy of 1.8 eV. The Si implants display no redistribution during either type of annealing, while the Be implants display more than one type of redistribution. Moreover, the complete description of the Be redistribution requires the knowledge of both the atomic and the electronic profiles. Capless annealing eliminates the additional processing steps of capping but it also sets a limit on the maximum temperature and time of the annealing.

Pulsed Electron beam annealing of phosphorus implanted CuInS2 has been found to be an efficient method in p-type doping of CuInS2. A sheet resistance as low as 10.1 Ω/‮, a sheet carrier concentration as high as l.0 ×1016 cm−2, and a hole mobility as high as 499 cm2 /V.s have been obtained. The irradiation energy density for the best doping condition was determined to be in the ranges between 11–13 J/cm2. Using Van der Pauw/Hall technique in conjunction with a chemical etching technique, the effective carrier concentration profiles have been determined with a maximum carrier concentration of ∼9×1019cm−3. Excellent p-n CuInS2 homojunctions have been fabricated by electron-beam pulse annealing with anideality factor of 1.75.

This bibliography presents 342 references to work published on rapid thermal processing (RTP) from 1979 through mid-1985. A variety of broad-beam energy sources are represented, including: arc and quartz-halogen lamps, blackbody radiators, strip heaters, broadly rastered electron beams, and defocused CO2 lasers. Citations were obtained by both manual searching and searching of a commercially available computerized data base (I NSPEC). Entries are grouped under 13 topical headings: reviews, implanted dopant activation and diffusion in silicon, polycrystalline silicon, silicides and polycides, metals, dielectrics, compound semiconductors, defects and microstructure, device applications (silicon and compound semiconductors), miscellaneous applications, equipment, and modeling. Within each group, citations are arranged alphabetically by title. A full author index is provided.