SIMOX substrate material from two sources, both as-implanted and annealed, have been analysed by Secondary Ion Mass Spectrometry (SIMS) to determine the nitrogen concentration in the silicon overlayer. A variety of different analytical conditions were used on two different SIMS instruments to reduce the possibility of artefacts arising from the difficulties of analysing nitrogen in these materials. The nitrogen contaminant level was found to be consistently below 5 x 1017 nitrogen atoms cm-3, for all the material analysed.

We discuss the physics involved in the melting and solidification of Silicon On Insulator thin films (SOI) using lamp or graphite strip heaters. The melting front, called “explosive melting”, controls to a large part the final morphological quality of the SOI film. It exhibits instabilities which can (i) nucleate the dewetting of the film, (ii) cause voids, and (iii) produce a poor surface morphology. The morphologies of the solidification fronts are analyzed. We show that, depending on the experimental conditions, different physical mechanisms are responsible for the front breakdown. Thus we propose that the variety of front morphologies results from the variety of the mechanisms involved, and of their combinations with the “faceting effects”.

In-situ optical microscopy has been used to observe liquid-solid interface morphologies during zone-melting recrystallization of silicon-on-insulator films. These morphologies have been correlated with the defect morphologies of the recrystallized films. Stable cellular solidification fronts, which are obtained at low zone velocities if the radiation intensity gradient in the interfacial region is small, yield subboundary free films. We suggest that under these experimental conditions the interface morphology is primarily the result of radiative heating rather than constitutional supercooling.

In this work faceted cellular growth has been investigated both experimentally and theoretically. The faceted cellular growth process and pattern formation have been modelled numerically. It is found that both the growth kinetics and the solute effect play important roles in determining the faceted cellular structure.

Polysilicon-on-alumina films have been zone-melt recrystallized with a graphite strip heater. High levels of in-plane stress and stress concentrations due to alumina grain pull-outs cause tensile failure at high temperature. This can be avoided by phosphorus incorporation into an SiOo layer between the polysilicon film and the alumina substrate. The glass layer provides high-temperature viscoelastic strain relief and planarizes the alumina substrate. Double-crystal diffractometry and anisotropic etch techniques indicate that the recrystallized silicon-on-alumina film texture is (100).

The effect of selective epitaxial growth (SEG) of silicon in the seed windows of silicon on insulator structures prior to recrystallization has been investigated. Subsequent zone melt recrystallization of these structures was performed in a dual electron beam system, and it was found that the full planarisation of the deposited silicon layer results in uniform film thickness after recrystallization. Cross sectional scanning and transmission electron microscopy, optical microscopy after defect etching, and bevelling are used to analyse the material. The SEG method improves the uniformity of the film for device island etching, and so is useful for all silicon on insulator applications, although the one of most interest for these investigations is the production of three dimensional circuitry. This is achieved by stacking layers of devices, and so planarity is particularly important.

A cold cathode line source electron beam system for forming SOI films by zone melt recrystallization is described. Possible advantages gained from using a cold cathode electron beam include the controllability of the beam profile and power level, as well as straight-forward scaling to recrystallization of 6 or 8 inch wafers. A computer-based melt width control procedure incorporating feedback to the line intensity from optical observation of the molten zone is also described. This technique allows direct control and adjustment of the melt zone over widths typically from 1 to 3 mm.

Crystal quality of SOI and electrical characteristics of p-MOSFETs fabricated in SOI films have been studied. The SOI recrystallization is done by a cw-operated, high-power, line-source and line-shaped electron beam annealing. Single crystal SOI strips, 15~20¼mxa few mm in sized, are formed with a good uniformity on a 4 inch diameter wafer by adopting the step and repeat system in the annealing apparatus. p-MOSFETs with ~90% field effect mobility of the bulk values are fabricated in the SOI films. The electrical characteristics of p-MOSFETs, fabricated in the SOI regions beyond the lateral seeding distance (~15¼m), are found to be independent of the low angle grain boundary density in the MOSFET channel, when the low angle grain boundaries extended toward the channel width direction.

Recrystallization of silicon-on-insulator (SOI) films using a line-source electron beam is described. This unique heat source can continuously emit several kilowatts of - 5 keV electrons into a beam 150 mm in length and - 2.5 mm in width, an exposure area which allows processing of 100 mm substrates in a single pass. An attractive aspect of this beam is the ability to control the beam profile, which in turn allows one to influence the thermal gradients present during recrystallization. Using a tightly focussed beam to recrystallize the SOI layer results in a film whose physical properties are generally attributed to films grown with a high thermal gradient at the solidifying liquid-solid interface (highly branched subboundaries with a maximum spacing of - 20 microns and several degrees of angular mismatch.) By reducing the gradient at the growth interface it is possible to achieve unbranched sub-boundaries with over 70 micron spacing and less than 0.5 degrees of out-of-plane tilt misalignment.

A pilot production Zone-melting Recrystallization system was designed and built with a capability to handle 25 wafer batches of 4“, 5“and 6“wafers. The design addresses several production requirements including high throughput, batch processing and automation. Measurements on product wafers indicate that material quality was not sacrificed to achieve production throughput levels. Exceptional structural quality and good electrical properties have been obtained on SOI wafers produced within this system. Specifically, defect densities as low as 5 X 104 /cm2 a level an order of magnitude lower than previously reported, have been achieved while the minority carrier lifetime of up to 30 microseconds, intrinsic dopant level < 2 X 1015 /cm3 and junction leakage below 1 X 1016 amperes/cm2 are either as good as or better than previously reported values. We believe that defect free ZMR material will become a reality.

The intensity profiles of various kinds of topheaters are compared and discussed. Using the mercury-arc lamp heater experiments on polycrystalline silicon layers of thicknesses varying from 1 to 10 urn were performed. The 10 fiva layers were polished prior to recrystallization. After zone melting recrystallization they showed a strong (100) texture combined with an alignment of the [010] direction with the scan direction. By patterning 1 ¼m poly-silicon films into isolated narrow silicon stripes, the kinetic mechanism that is shown to be responsible for the alignment of the [010] direction along the scan direction could be inhibited. In this way other mechanisms that influence the orientation could be studied. Finally some electrical characteristics are presented.

We have studied the recrystallization of silicon films using a focused dual-lamp apparatus. By careful measurement and control of the power density profile (and focal-plane location) of the line-image and of the uniformity of the substrate temperature we have achieved recrystallization of SOI films on 4“silicon wafers. By taking advantage of the measured difference in power-density-profiles of an arc lamp and a tungsten lamp in the dual-lamp apparatus we have achieved low temperature-gradient, reduced-stress recrystallization yielding SOI films in which the usual branched pattern of subgrain-boundaries are replaced by individual dislocations. In situ study of the melt- and growth-fronts, was done using a viewing system with a resolution of - 10 ¼m. We have also done studies of stress-relief schemes.

Selective Epitaxial Growth (SEG) techniques find a growing number of applications in the field of Si IC's, such as, lateral isolation, vertical interconnects, seeded recrystallisation etc. In the present work, the use of Si SEG by CVD combined with in-situ deposition of a- or poly-Si for the improvement of SOI obtained by Zone Melting Recrystallisation (ZMR) or by Lateral Solid Phase Epitaxy (SPE) is described. The principle application for which the present work is intended is Three Dimentional (3D) Integration. One of the main constraints imposed on process is thermal compatibility with previously executed process steps. Hence the need to reduce the thermal budget for the Selective Epitaxial Growth as much as possible.

Multiple layers of silicon on insulator have been recrystallized using a dual electron beam technique. The aim of the investigations was to produce structures suitable for three dimensional circuit applications, and so a number of strategies have been used, providing a range of opportunities for such applications. In particular, two layers of silicon on insulator have been recrystallized simultaneously, and also a second layer has been recrystallized, seeded from a previously regrown film.

Recent progress in the heteroepitaxial growth of layered structures of Si, Ge, GaAs, and alkaline earth fluorides is reviewed. Effectiveness of the predeposition technique, in which a thin Si layer is deposited on the CaF2 surface at room temperature prior to the growth of a thick Si film at 800 °C, is shown for the growth of Si films on CaF2/Si structures. In case of the overgrowth of Ge and GaAs films on (111) substrates, modification of the fluoride surface by electron beam exposure is effective to increase the wet-tability between fluoride and semiconductor films and to improve the crystal -1 inity and surface morphology of the films. Finally, antiphase disorder in the GaAs(100) films grown on fluorides is experimentally studied and the generation mechanisms are discussed.

A new in-situ rapid thermal annealing (RTA) apparatus which can be used to anneal entire wafers in an ultra high vacuum environment has been designed to be used in conjunction with the epitaxial growth of heterostructures. Drastic improvement in the crystallinity of CaF2/Si(100) can be achieved with RTA, and our results suggest that RTA can be used as an on-line processing technique for novel epitaxial structures.

We have explored the possibility of fabricating a metal base transistor in the Si/CoSi2 material system. Utilizing recent advances in the growth of thin, pinhole free, CoSi2 layers on Si(111) we have measured the transistor characteristics of a Si/CoSi2/Si structure. The observed low common emitter current gain is attributed to an absence of current carrying states in the CoSi2 transistor base.

Silicon (001) substrates were implanted with 350 keV co at room temperature and 450°C with fluence of from 1x1017 Co/cm2 to 6x10 Co/cm2. All samples were annealed at 1000°C in order to form the CoSi2 phase. Concentration profiles were determined with Rutherford backscattering spectrometry (RBS), and the associated strain profiles were analyzed with double-crystal X-ray rocking curve measurements. Ion channeling was also used to characterize.the suicide formation and crystal quality. An implantation of 6x1017 Co/cm2 at 450°C forms a single-crystal CoSi2 layer while lower fluences do not. A continuous, buried CoSi2 single-crystal layer is formed for the 3x1017 Co/cm2 sample implanted at 450°C and annealed at 1000°C. The continous CoSi2 layer is thicker than the critical layer thickness for a fully coherent film, and therefore the layer partially relaxes. A relaxation of 50% of the fully coherent value is observed for this buried suicide system.

Deep buried metallic layers are formed by 6 MeV high dose Ni implantation into Si at 450 K. The layers have been characterized by optical reflectivity and spreading resistance depth profiling as well as TEM and XTEM. They consist of epitaxially grown NiSi2 crystallites of both type-A and type-B orientations and thin NiSi2-platelets on {111} lattice planes. Investigations indicate the suppression of amorphization by Ni as well as damage gettering of Ni atoms.

Buried TiSi2 layers, about 600Å thick and 900Å below the surface, were formed in < 111> silicon by ion implantation. The implantation was done with either 120 or 170 keV Ti+ to doses ranging from 5 x 1016 to 2 x 1017 ions/cm2, and at temperatures of between ambient and 650° C. Annealing was done at 600° C, 700°C and 1000°C. Continuous buried layers were achieved only with samples implanted with doses equal or greater than 1017 ions/cm2 and at temperatures above 450°C. Below this dose TiSi2, was present only as discrete precipitates. For room temperature implants, the TiSi2, layer is formed on the surface. The damage present consists of dispersed TiSi6 precipitates and microtwins.