In this work we present a study of the properties of ZnO thin films produced by spray pyrolysis and r.f. magnetron sputtering. Before the annealing treatment the properties of the films are very similar, which means that the films produced by both techniques could be used on optoelectronic devices. However spray pyrolysis is a more simple and cheap technique than sputtering, but with this last technique the thin films exhibit a higher uniformity.

Optically assisted, metal induced crystallization (MIC) was used to convert amorphous Si films, deposited on Al coated glass substrates, into polycrystalline Si (pc-Si). The study investigated the effects of deposition temperature, process temperature, and film thickness on the grain orientation, grain size, and crystallization front of the processed films. Furthermore, we have attempted to examine the role of Al in MIC – in particular, whether the metal can be confined to the interface while grain enhancement occurs.

Amorphous silicon films were transformed into large-grain polycrystalline silicon films by excimer laser induced rapid melting and solidification. Growth is seeded by residual unmolten silicon left in a grid of holes made in the underlying silicon oxide layer. Growth thus starts with a vertical growth phase, during which occlusion of grains occurs, ideally filtering out only a single grain that subsequently seeds the lateral growth. Yield was increased by sharpening the edges of the hole to improve the filtering mechanism and very uniform polycrystalline layers were obtained. Furthermore, simulations were performed to analyze parameters such as growth velocity and melt depth. It was found that heat from laser light absorbed in the neighborhood of the hole strongly contributes to melt depth and thus to the filtering mechanism. Substrate heating or longer pulse durations can be utilized to ensure the occlusion of grains during vertical growth, to reduce thermal stresses, and to increase grain size to a value sufficient for single crystal thin-film transistors.

Laser based crystallization of thin amorphous films on glass substrates have entered into industrial applications since several years. The excimer laser based process provides a low temperature procedure to obtain polycrystalline silicon films on flat panel display substrates to fabricate thin film transistors (TFT's).

The key to this application is a uniform illumination of the. Line Beam systems provide up to 365mm long homogeneous exposure fields operated with up to 300 W average power 308nm excimer lasers. The paper covers a technical overview of Line Beam Optics layout, recent developments and results.

Further high resolution optics are described and discussed for sequential lateral solidification (SLS) (1,2,3) processes. The SLS application has demonstrated to efficiently produce directionally solidified microstructures or even grain-boundary –free regions on Si-films. Diffraction limited resolution in the range of several micrometers and high optical throughput are important parameters to this application.

General considerations are presented to describe technical limits which compromise laser beam related coherence effects, optimum uniform illumination, adequate resolution and depth of focus and optical efficiency for the practical application.

This paper reviews an excimer-laser annealing (ELA) method of Si thin-films on glass studied in the Tokyo Institute of Technology, aiming at position-controlled ultra-large grain growth with high packing density by a single shot irradiation of a laser-light pulse. Key concepts are (I) 2-D modulation of the laser light intensity on the sample surface, (II) reduction of the heat removal rate from the molten Si thin layer of high temperature, and (III) enlargement of the effective specific-heat while keeping the effective thermal-conductivity low for annealed layers. There were two possible solutions for the condition (I). The first solution is of an application of a cross-coupled phase-shifter formed on a transparent quartz plate. The second solution is of a half-tone phase-modulation method (PAMELA method) using semi-transparent thin films on quartz substrate with phase-shifter. The condition (II) is satisfied by changing the SiO2 underlayer to the porous or organic silica underlayer for reducing vertical heat flow flux to the cool underlayer, and by thinning the Si layer for reducing heat flow flux along the highly conductive Si layer. The condition (III) is satisfied, by the SiON capping layer for a KrF excimer laser, and by the SiOC capping layer for a XeCl excimer laser, since they have a reasonable light absorption coefficient, low thermal conductivity, large specific-heat and sufficient heat tolerance.

This paper reviews the results of the development of high power (up to 1 kW), high energy (up to 10J) prototypes of excimer lasers that are of interest to meet expanding requirements of the electronic industry. Some experimental characteristics are presented for various excimer prototypes operating at the important wavelength of 308nm (XeCl). Keywords: Excimer laser, average power, output energy, annealing

We report a metal oxide semiconductor field effect transistor (MOSFET) controlled field emission array (FEA) device. The device uses a lateral double diffused MOSFET (LD-MOSFET) to control electron supply to the surface. The FEAs were fabricated using isotropic etch of silicon, oxidation sharpening and chemical mechanical polishing. The LD-MOSFETs have a threshold voltage of 0.48V while the FEAs have a turn-on voltage of 28V. Analysis using the FN formulation indicates that a silicon tip radius of 11 nm would fit the FEA IV data. The tip radius from the electrical data is very close to the average tip radius of 10 nm obtained from transmission electron microscope (TEM) analysis. The IV characterization of the MOSFET/FEA demonstrated control of electron emission by the MOSFET gate voltage.

In this work, was investigated both numerically and experimentally, the excimer laser processing of a-Si films deposited on SiO2-coated glass substrates, using the very large area (∼ 20 cm2) and long pulse duration (200 ns) excimer source from SOPRA Company. Experiments were carried out in air or in neutral atmosphere, using both the single- and multi-shot mode. From the microstructural analysis of the laser irradiated area the formation of a large-grained material through the so-called SLG regime was evidenced. In addition, the application of a multi-shot process was demonstrated to be very efficient to prepare uniform polysilicon layers with enlarged grain sizes (up to 1.5 µm after 20 shots). Finally, poly-Si TFTs prepared in the optimized conditions (multi-shot, neutral ambience) exibited field effect mobilities up to 235 cm2/V.s (for N-type) and 84 cm2/V.s (for P-type), with fairly uniform device characteristics over large area and excellent stability under electrical stress.

The effect of a-SiNx films stoichiometry and their physical properties on the electrical integrity and masking ability is studied. The films are deposited at 120° C by 13.56 MHz PECVD from SiH4+NH3 + N2 gas mixture. They have the N/Si ratio of 1.4 to 1.7 and hydrogen concentration of 25 to 40 at.%. The electrical characterization was carried out by I-V measurements. An electrical resistivity of ∼1016 Ohm-cm and breakdown voltage of 5.5 MV/cm have been achieved for our PECVD nitride films. The performance of a-Si:H TFTs with these silicon nitride as the gate dielectric and passivation layer has been also evaluated.

Low field electron emission from novel room temperature grown multilayered cold cathodes were studied. The cathodes consisted of a layer of nanocrystalline diamond and a layer of nanocluster carbon films. The nanocrystalline diamond was first coated on to the substrate. The nanocluster carbon films and the tetrahedral amorphous carbon films were then deposited on the nanocrystalline diamond coated substrates using the cathodic arc process at room temperature. The heterostructured microcathodes were observed to exhibit electron emission currents of 1µA/cm2 at fields as low as 1 V/µm. The effect of the nanoseeded diamond size and concentration and the properties of different nanocluster carbon films on emission characteristics is presented.

Highly textured transparent conducting ZnO:Al thin films have been prepared by r.f. magnetron sputtering. The films were deposited on polyester (Mylar type D, 100 μm thickness) and glass substrates at room temperature. Surface stylus profiling, X-ray diffraction, scanning electron microscopy, transmission electron microscope and Hall effect measurements as a function of temperature, using the van der Pauw technique have characterized the films. The samples are polycrystalline with a hexagonal wurtzite structure and a strong crystallographic c-axis orientation (002) perpendicular to the substrate surface (columnar structure). The ZnO:Al thin films with a resistivity as low as 3.6×10−2 ωcm have been obtained, as deposited.

The transfer of thin monocrystalline silicon films to foreign substrates is of great interest for a number of applications such as silicon on insulator devices, active matrix displays and thin film solar cells. We present a transfer approach for the fabrication of monocrystalline Si films on foreign substrates based on the formation of quasi-monocrystalline Si-films. Our transfer approach is compatible with high temperature processing such as epitaxial growth at 1100°C, thermal oxidation and phosphorous diffusion. Reuse of Si host wafers is demonstrated by the subsequent epitaxial growth of three monocrystalline Si films on a single host wafer. Monocrystalline Si films with a thickness of 15 µm and a diameter of 3” are transferred to glass and flexible plastic substrates. The typical light point defect density in films transferred from virgin wafers ranges between 10 to 100 cm−2, while stacking fault and dislocation densities are ≤ 100 cm−2. The minority carrier diffusion length in the epitaxial Si films is around 50 µm.

We have proposed and fabricated a novel poly-Si TFT that is integrated into the gate-data line-crossover in order to increase aperture ratio and to decrease signal delay of AMLCD panel and electrical characteristics of TFT integrated into gate-data line-crossover almost are identical to conventional TFT. The aperture ratio of AMLCD panel was increased considerably because the TFT was located under the opaque metal line. We employed a low dielectric air-gap between the gate-data line crossover, which reduced a capacitance between the gate and data lines so that the RC signal delay of the data line is decreased significantly. Our experimental result shows that the fabricated TFT was successfully operated and the proposed structure found to reduce the RC signal delay has been reduced by factor of 9 compared with conventional AMLCD panel that employs SiO2 for insulator between gate and data lines.

A series of large area single layers and heterojunction cells in the assembly glass/ZnO:Al/p (SixC1-x:H)/i (Si:H)/n (SixC1-x:H)/Al (0<x<1) were produced by PE-CVD at low temperature. Junction properties, carrier transport and photogeneration are investigated from dark and illuminated current-voltage and capacitance-voltage characteristics. For the heterojunction cells Atypical J-V characteristics under different illumination conditions are observed leading to poor fill factors. High serial resistances around 106 Ω are also measured. These experimental results were used as a basis for the numerical simulation of the energy band diagram, and the electrical field distribution of the whole structures. Further comparison with the sensor performance gave satisfactory agreement.

Results show that the conduction band offset is the most limiting parameter for the optimal collection of the photogenerated carriers. As the optical gap increases and the conductivity of the doped layers decreases, the transport mechanism changes from a drift to a diffusion-limited process.

Ablation lithography is based on the photo-decomposition ablation of polymer materials by excimer laser. It is a self-development process, and accordingly possible to reduce the throughput time and manufacturing cost of TFT-LCD. The major alterations from the conventional photolithography are the resist material and the mask. Developing both the technologies and using an experimental exposure& aligner, we fabricated a TFT pattern on 300 × 400 mm2 glass substrate. The result proves the feasibility of EAL as an high throughput lithography suitable for a-Si TFT.

The continued shift towards the integration of diverse functions into single chips and chip assemblies requires a new vision in microelectronic systems integration. Over the last decade or so, there has been a tremendous push towards systems on chip (SoC) approach for increased functionality. While systems on a chip has received much deserved credit for the size and cost reduction of many products, a true system on a chip solution has not been practical for a number of applications. In some cases, this is simply an issue of chip size, in others material compatibility (Si and GaAs), in yet others electrical compatibility (high voltage, RF, analog, with digital) and in some others the overall cost of integration on silicon, even if technically feasible. The need to combine diverse materials and technologies to achieve increased functionality with decreased size and weight, along with the ever present pressure for lower cost, has created the opportunity for new system level integration opportunities. Among the new concepts, system in a package (SiP) and system on a substrate (SoS) have received the most attention. System in a package is a natural extension of system on a chip concept. Currently, there are aggressive programs to develop SiP capabilities to allow rapid, cost effective design and fabrication of subsystem level packages. System on a substrate is an emerging concept based on the integration of technologies in a wide area of electronics. SoS will take the next step to the full system level (e.g. a monolithic radio). However, there is another important concept that seeks the same objective of system-level integration, but with a different set of drivers. In situations where the product is required to be a certain size (e.g. a display or a smart card), further size reductions of the components is no longer productive. This creates the opportunity for alternative technologies such as thin film transistors and plastic substrates. Integration of these technologies offers the potential for significant cost savings because of lower manufacturing costs, and light weight, wearable, flexible products by elimination of today's rigid substrates. Such technologies not only offer new capabilities, but also change the basic premise of the electronics industry. We could move from the microelectronics to the macroelectronics era. In this paper, we will present an overview of this diverse and emerging technology.

Silicon dioxide (SiO2) films have been deposited at 80°C in an Electron Cyclotron Resonance (ECR) plasma reactor from a gas phase combination of He, O2 and SiH4. The ECR configuration provides a highly ionised plasma (∼1016 m−3) with low ion energies (∼10eV) that gives efficient dehydrogenation of the growing material whilst minimizing defect creation. The physical characterisation of the material gives a refractive index of 1.46, an etch rate in buffered HF below 3 nm/s and a hydrogen content of less than 2 at.%. Electrical tests reveal a resistivity in excess of 1014Ωcm, an average breakdown strength of 5 MV/cm, and fixed charge and interface state densities of 1011 cm−2 and 1012 eV−1cm−2 respectively. This has been achieved using a O2:SiH4 flow ratio ≍ 2:1.

In this work, high quality silicon dioxide (SiO2) films were prepared by large-area plasmaenhanced chemical vapor deposition (LA-PECVD) using tetraethylorthosilicate(TEOS)-oxygen based chemistry. The effects of various short-time plasma treatments on these as-deposited TEOS oxide were also investigated. Different plasma treatments such as O2, N2O, and NH3 were used in our experiments. Electrical characteristics were exploited to examine the effects of plasma treatments. It was shown that after N2O, and NH3 plasma treatments, the electrical strength of oxide was enhanced. Besides, NH3 plasma treatment exhibited the highest enhancement efficiency. O2- plasma treatment, however, showed some harmful effects on the electrical properties of the TEOS oxide. The reliability tests including charge to breakdown (Qbd) and bias temperature stress (BTS) were also analyzed in these samples. Although better pre-stress characteristics were observed in those samples treated by NH3-plasma, samples with N2O plasma treatment showed superior stress endurance. Consequently, N2O plasma treatment seems to be the best candidate for future TFTs under the consideration of long-term reliability.

The effect of excimer laser annealing on the properties of ultra-low temperature (150°C) plasma enhanced chemical vapor deposited (PECVD) oxides was investigated. Annealing was performed using a 308 nm excimer laser incident directly on the oxides, at fluences up to the melting of the silicon and for as many as 3000 pulses. Following multiple shot irradiations below the silicon melt threshold, the CV threshold voltage was observed to decrease by ≍15V volts, coupled with an increase in the slope near threshold. Leakage currents measured by IV were not significantly changed. Property modifications are shown to be comparable to a 450°C thermal soak anneal. These results suggest that excimer laser annealing has potential to improve ultra-low temperature gate dielectrics for poly-Si Thin Film Transistors (TFTs) on plastic substrates.

Thin film transistors (TFTs) are fabricated inside a large, location-controlled, silicon grain, fabricated with the grain-filter method. In a first experiment TFTs with high field-effect mobility for electrons of 430 cm2/Vs are fabricated. The off-current and subthreshold swing have high values of 60 pA and 1.2 V/dec, respectively. The grain-filter is improved by doping the channel and by planarizing the grain-filter by chemical mechanical polishing (CMP). TFTs fabricated in CMP-planarized grain-filters have mobility, off-current, and subthreshold swing of 430 cm2/Vs, 0.3 pA, and 0.29 V/dec, respectively, which compares well with the characteristics for SOI TFTs.