The importance of contacts to photovoltaic solar cells is often underrated mainly because the required values of specific contact resistance and metal resistivity are often thought to be relatively modest compared with those associated with very large scale integration (VLSI) applications. However, due to the adverse environmental conditions experienced by solar cells, and since many of the more efficient cells are economically advantageous only when operated under solar concentration, the requirements for solar cell contacts are sometimes more severe. For example, at one-sun operation, the upper limit in specific contact resistance is usually taken to be 10−2 Ω-cm2. However, at several hundred suns, this value should be reduced to less than 10−4 Ω-cm2. Additionally, since grid line fabrication often relies on economical plating processes, porosity and contamination issues can be expected to cause reliability and stability problems once the device is fabricated. It is shown that, in practice, these metal resistivity issues can be much more important than issues relating to specific contact resistance and that the problem is similar to that of providing stable, low resistance interconnects in VLSI. This paper is concerned with the design and fabrication of collector grids on the front of the solar cells and, although the discussion is fairly general, it will center on the particular material indium phosphide. This III-V material is currently of great importance for space application because of its resistance to the damaging radiation experienced in space.

We report on experiments that were performed to evaluate the temperature stability and long term reliability of non-alloyed Pd-Ge-Au ohmic contacts on N-type GaAs. Low resistance contacts (≈1×10−6Ωcm2) were obtained for samples that were sintered in a conventional furnace or flash sintered in a graphite susceptor. Elevated temperature storage (≈4000 hours at 280°C) showed improved contact stability when compared to Ni-AuGe-Ni-Au control samples. Gateless MESFETs subjected to bias temperature stress measurements (Ids ≈300-350mA/mm, 2000–4000 hours at 200°C) showed no significant change in device current. This result is in contrast to devices with Ni-AuGe-Ni-Au ohmic contacts which exhibited a 6–27% decrease in current under the same test conditions. Failure analysis reveals significant electromigration and Au diffusion in the drain fingers of devices with Ni-AuGe-Ni-Au contacts. In contrast, devices with Pd-Ge-Au contacts show no electromigration or Au diffusion in the GaAs.

Au(85nm)/Pd(55nm)/GaAs(100) samples were heat treated in the 325-425°C temperature range. The annealed samples have been investigated using Rutherford Backscattering Spectrometry, Auger Electron Spectroscopy and Transmission Electron Microscopy. The gold layer remained largely unreacted up to 300°C. Significant Pd diffusion into GaAs consuming a 50–60 nm thick layer of GaAs .is evident in the case of sample annealed at 325°C and a slight Au diffusion is also noticeable. In the sample annealed at 350°C the spreading of palladium was very quick. A strong reaction took place between the GaAs and the metallization in the case of sample heat treated at 375°C. At this temperature we have identified the PdGa phase using electron diffraction.

We shall study the thermoelectric power under classically large magnetic field (TPM) in optoelectronic materials of quantum wells (QWs), quantum well wires (QWW’s), quantum dots (QDs) and compare the same with the hulk specimens of optoelectronic materials by formulating the respective electron dispersion law. The TPM increases with decreasing electron concentration in an oscillatory manner in all the cases, taking n-Hg1-xC dxTe as an example. The TPM in QD is greatest and the least for quantum wells respectively. The theoretical results are in agreement with the experimental observations as reported elsewhere.

The thermal stability of PtAl thin films on GaAs substrates has been studied using transmission electron microscopy and Auger electron spectroscopy. The PtAl thin films were formed by sequential deposition of discrete Pt and Al layers on GaAs by e-beam evaporation followed by subsequent annealing processes. Interfacial reactions in the Al/Pt/GaAs system proceed in two stages. Upon low temperature annealing Pt and GaAs react to form PtGa and PtAs2. Further high temperature annealing causes PtGa, PtAs2 and Al to react together producing the desired PtAl on GaAs. We observed solid-phase epitaxial regrowth of GaAs during the second stage of reaction. The PtAl/GaAs interface is determined to be thermally stable during an 800°C/30 min. anneal, while remaining morphologically uniform on GaAs.

The relationship between microstructure, composition, resistivity and processing procedures of W-Si layers on (100) GaAs was examined for both “as deposited” specimens and specimens annealed at temperatures between 100°C and 1000°C. TEM, EDAX, SIMS, AUGER and four point probe resistivity measurements were employed.

The layers, exhibiting a columnar growth structure typical of sputter deposition, are amorphous below ≈ 800°C. At 700°C, the formation of pits, attributed to the outdiffusion of Ga and As into the W-Si layer, is observed at the W-Si/GaAs interface. The Ga and As outdiffusion was confirmed for temperatures above 700°C. The layers annealed between 800°C and 1000°C consist of a polycrystalline mixture of αW, βW and W5Si3 with coarse particles, thought to be W5Si3 precursors, formed along the W-Si/GaAs interface and protruding into the substrate. As the frequency of these protrusions increases with increasing temperature, the resistivity of the W-Si layers decreases.

Both the composition and the resistivity of the W-Si thin films are affected by the processing procedure. The Si/W ratio of the W-Si thin films decreases whilst their resistivity significantly increases as a result of etching away the Si3N4 capping layer using HF. It is thought that this is due to the removal of Si-oxides formed within the layer during the W and Si sputtering. The decrease in the Si/W ratio and the increase in resistivity are not observed if an A1N capping layer is used.

Alloyed Au/Te/n–GaAs ohmic contacts, with contact resistivities comparable to those of the AuGe device standard, have been developed and studied by Mässbauer spectroscopy, Raman scattering and X-Ray Diffraction. The formation of Au-doped Ga2Te3 crystallites, grown epitaxially on a defectively GaAs surface was observed. No evidence for the formation of an n++–GaAs surface layer could be derived. The interpretation of all experimental results leads to a description of the ohmic conduction mechanism based on a resonant tunneling process assisted by defect/impurity related deep levels through low barrier metal/Te/(Au)Ga2Te3/GaAs interfaces

Ni/Ge/Au and Ni/Ge/Pd contacts have been made on 1018 cm-3 n-type GaAs. The contacts were subjected to ion beam mixing through the metallization using 70-130 keV Se+ ions and subsequently subjected to rapid thermal annealing (RTA). These are compared with unimplanted contacts produced by RTA techniques on the same substrate. The specific contact resistance ,pc, has been measured for the two systems. In addition, the contacts have been studied using Auger depth profiling and SEM studies have been used to determine surface morphology. Values of pc ∽ 10-6 -10-7 ohm-cm2 have been measured. It is observed that ion beam mixing or the addition of a Ti overlayer (to the Ni/Ge/Au) improves the contact morphology.

A new Rapid Thermal Annealing technique has been developed which uses very small samples of low melting elements and eutectic alloys to standardize temperature measurements. Temperatures of thin films during anneal are shown to lie within −3°C to +13°C of nominal for measured short anneal times using a special sample geometry. Results of annealing Ge/Ni/GaAs and Au/Ge/Ni/GaAs at 200°C and 250°C are presented. Rutherford backscattering is used to analyze the films and the resulting channeling spectra show that Ge consumption follows parabolic kinetics, with an activation energy estimate of ≈ 0.7eV. The data is consistent with a controlling process of fast Ni diffusion through grain boundaries at these low temperatures. We expect that a Ni2Ge phase is being formed preferentially, along with a NixGaAs phase at the GaAs/Ni interface. In this contact metal system Au interacts only minimally for the times and temperatures studied. Our results agree with those of previous workers who studied Ni diffusion during NixGaAs phase formation at comparable temperatures.

The influence of titanium additions on the microstructure of Au-Ge-Ni ohmic contacts on gallium arsenide has been evaluated. Sequentially deposited layers of Ge, Au and Ni were topped with a titanium layer. The titanium formed a native titanium oxide on the upper surface of the contact which helped to maintain a continuous film during the anneal. Both the as-deposited and the annealed microstructures were studied with the use of electron microscopy techniques. In order to examine thoroughly the various phases which form in the annealed contact, unique specimen preparation procedures were used to fabricate a single plan-view specimen in which it was possible to examine the microstructure at various depths.

The formation of low temperature Au-Ge contacts to n-GaAs is a two-step process. In the first step, the metals segregate into Au and Ge rich regions and the intermixing of the Au and Ge with the Ga and As causes a reduction in the barrier height. The second step occurs after extended annealing, during which time Au and Ge continue to diffuse into the substrate. An orthorhombic Au-Ga phase is formed and it is likely that other Au-Ga or Ge-As phases are formed. The length of the extended anneal is dependent upon the atomic percent of Ge in the film, with the 10 at. % Ge taking 6 hr., the 27 at. % Ge taking 3 hr. and the 50 at. % Ge taking 9 hr. to become ohmic. The 75 at. % Ge sample doesn’t show ohmic behavior even after 33 hr. of annealing. The metal-semiconductor interface configuration appears abrupt, showing no protrusions into the GaAs substrate.

The microstructure and contact resistance of NiAuGe contacts to n-type GaAs were determined as a function of initial contact composition. The contact microstructures were found to contain varying amounts of of α, α’ and β (or Au7Ga2) Au-Ga, epitaxial Ge, NiGe and NiGeAs phases. A previously unidentified NiAsx (Zr,B) phase was also observed. The contact resistance was found to vary between 0.22-0.38±0.03Ωmm. Comparison of the microstructural and contact resistance data revealed that the ohmic formation models based on (i) the formation of a recrystallised n+ GaAs layer and (ii) the presence of a graded Ge/GaAs heterojunction were not applicable to this contact system.

Considering the effect of the simultaneous presence and interaction of the different phases at the contact, a modification of the model presented by Wu and coworkers (Solid-St. Electron. 29 (1986) 489] for explanation of ohmic contact resistance of n-GaAs was developed. The modified model combines the existence of the mixed phase structure of AuGeNi/n-GaAs contact with assumptions proposed by Wu et al. that the specific contact resistance Rc contains two parts Rcl and Rc2, where Rc1 is the specific contact resistance of the alloyed and underlaying doped contact region, and Rc2, is that of the high-low junction between the heavily doped contact region and the bulk semiconductor. The Rc1 depends strongly on the apparent barrier height and the effective impurity concentration formed by doping from the contact alloys during annealing. In the present paper a new theoretical model for Rc1 is proposed and compared with the experimental results.

The strong dependence of electrical properties of Pt/Ti ohmic contact to p–In0.53Ga0.47 As (Zn: 5 × 1018 cm−3) on the interfacial microstructure formed by rapid thermal processing (RTP) were intensively studied by transmission electron microscopy, Auger Spectroscopy, and transmission line model (TLM) measurements. The rapid decrease of the specific contact resistance with an increase in RTP temperature was correlated with the development of an interfacial reaction zone. Significant interdiffusion of Ti, In and As across the interface occurred at temperature above, 350°C for a 30 second of RTP. A minimum specific contact resistance (3.4 × 10−6 Ω-cm2) was achieved at RTP temperature of 450°C. The corresponding interfacial microstructure revealed a complicated solid state reaction zone with InAs as one of the major interfacial compounds. The low contact resistance is attributed to the carrier conduction through the InAs regions. This is also consistent with the results of Pt/Ti contact experiments to p-type InAs, InP and GaAs binary surfaces, where the lowest contact resistance was achieved on InAs (3.0 × 10−7 Ω-cm2at Zn: 5 × 1018 cm−3). The temperature dependence of specific contact resistance of as-deposited Pt/Ti contact to InGaAs agrees very well with the thermionic emission dominated carrier transport mechanism with an effective barrier height, φb, of 0.13V. The rapid decrease in the contact resistance as well as its reduced temperature dependence after RTP treatment at elevated temperatures suggesting a partial conversion of thermionic emission dominated contact area to field emission dominated regions. A phenomenological theory of multiple parrallel carrier conduction processes was proposed to analyse the temperature dependence of specific contact resistance for contacts with complicated interfacial microstructure. It was found that, for low resistance contacts, majority of the carriers conducted through only a fraction of the contact area via a tunneling mechanism.

Pl/Ti and W thin films on n- and p- type InP and related materials have been investigated for potential use as a refractory ohmic contacts for conventional, single-side coplanar contacted and self-aligned barrier hetcrostructurc laser devices. Pt and Ti films were deposited sequentially by electron gun evaporation, while the W layer was rf sputtered, both onto p+ -In0.53Ga0.47As (Zn doped 5×l018cm−3) and n−- InP (S doped, 5×l018cm−3). The deposition parameters of the two metal systems were optimized to produce adherent films with the lowest possible induced stress. Almost all the studied systems performed as ohmic contacts already as-deposited and were heat treated by means of rapid thermal processing in the temperature range of 300–900°C. The final contact processing conditions were tuned to provide the lowest possible contact resistance values accompanied by low mechanical stress and stable microstructure.

We report for the first time the realization of submicron pseudomorphic Al.15, Ga.85As-In.20Ga.80As HEMT’s with non-alloyed Pd/Ge ohmic coi tacts. Best results of contact resistance were obtained at a sintering temperature of 340°C with values as low as 0.057 Ωmm. Enhanced contrast, needed for accurate alignment of the gate by electron-beam lithography, was obtained by using Pd/Ge/Ti/Pd and Pd/Ge/Ti/Pt metal sequences. These contacts exhibited even lower contact resistances than the standard Pd/Ge contacts. Although Pd/Ge/Ti/Pd exhibits good morphology, reaction is witnessed at the edges, reducing the accuracy of alignment.

Processed enhancement mode devices exhibit maximum transconductances in excess of 520 mS/mm and currents of 300 mA/mm for 0.3 micron gatelength. This study shows that the contact resistance is no longer a restriction for obtaining very high transconductances in high performance devices.

We have investigated the contact spreading phenomenon observed when small area Au contacts on InP are annealed at temperatures above about 400 C. We have found that the rapid lateral expansion of the contact metallization which consumes large quantities of InP during growth is closely related to the third stage in the series of solid state reactions that occur between InP and Au, i.e., to the AU3In-to-AugIn4 transition. We present detailed descriptions of both the spreading process and the Au3In-to-AugIn4 transition along with arguments that the two processes are manifestations of the same basic phenomenon.

As compared to a stand alone rapid isothermal annealing unit, the integration of deposition system and rapid isothermal processing unit is very attractive for the next generation of micro, opto and cryoelectronics. We have used in-situ rapid isothermal processor for in-situ rapid isothermal chemical cleaning of InP, solid phase epitaxial growth of II-A fluorides, and in-situ metallization of InP capacitors. As compared to ex-situ annealed films, SrF2 films deposited on InP by in-situ rapid isothermal processed films show less thermal stress and lower thermal hysteresis for the identical thermal budget. Similarly, as compared to ex-situ annealing, in-situ cleaning of InP before metallization followed by in-situ annealing results into improved high frequency capacitance-voltage (C-V) characteristics of Al-SrF2-InP capacitors.

The need for an Anti-Reflection Coating (ARC) on aluminum metallizations is well known. A new class of materials based on tungsten-silicide and tungsten-silicon-nitride has been developed Tor use as an ARC. It has been shown that the reflectivity (relative to aluminum = 100%) can be decreased to −55% for the tungsten-silicide material and to −6% for the tungsten-silicon-nitride materials. These materials are easily etched in fluorine containing plasmas and are not as sensitive to thickness uniformity issues as dyed resists or amorphous silicon ARC materials. The option of leaving these ARC materials on the aluminum lines may lead to an increase in the electromigration resistance. The dependence of the reflectivity on nitrogen content has been investigated. Additionally, the reflectivity reducing properties have been studied on a variety of substrates such as aluminum, gold, tungsten, tantalum, and silicon.

Fundamental principles of nanocomposites are discussed. The basic features of nanocomposites are low dimensionality of their composition components, widespreadness of the electronic interactions between the components and the great variety of microstructure of nanocomposites ranging from high level ordered 3-dimensional periodic structure to stochastically dispersed medium of superfine particle. All these offer much more potential for tailoring the property of materials than by formation of chemical compound or mixture including microcomposites. Vapour deposition enhanced by ion beam and electrical discharge plasma provides a class of versatile processes both for preparing low dimensional components of nanocomposites and for synthesizing nanocomposite film itself. Elements of designing nanocomposite thin films and their preparing by ion beam and plasma enhanced vapour deposition are also discussed. Examples of nanocomposite films are given.