We demonstrated an in-situ dielectric film passivation technique by dividing a thick film deposition into many thin film (<40Å) depositions and incorporating the ion bombardment between the depositions. N2 was used for the plasma treatment to passivate the SiNx film and a well passivated and thermally stable SiNx was achieved with this process. The refractive index of N2 treated SiNx film only changed 0.3% when the SiNx film was heated up to 1000 °C and the film with a continuous deposition showed a 2.5% change. From the results of SIMS analysis, the N2 treated SiNx film showed a excellent thermal stability after heat up to 1000 °C. The etch rates of passivated SiNx film in BOE and diluted HF are ≤40 Å/min which is much slower than that of un-treated SiNx (135 Å/min).

The use of a low ion energy of an extremely dense plasma has been studied as a dry etching as well as a thin film deposition tool (same source, two different reactors) for InP and GaAs device processing. Under these working conditions it is expected to control well the etch depth or in the case of deposition to obtain high deposition rates. In all cases minimun ion damages are induced on the processed substrate. Both technologies are presented here from the point of view of material analysis as well as device processing demonstration. For etching, the gate recess of an InP-based HEMT has been addressed as one of the key technological step that requires such properties for good device performances. InGaAs/InAlAs HEMT like structures have been grown and the recess of the InGaAs layer has been conducted with a 13eV SiCl4 inductively coupled plasma (ICP). DLTS and AFM measurements made on the exposed AlinAs surface after InGaAs removal indicate that device quality on its electrical and structural properties are achieved. Passivation of fully processed HEMT devices with a ICP enhanced chemical vapor deposition (ICPECVD) silicon nitride film is being studied.

Wet oxidation of high-Al-content AIGaAs semiconductor layers in vertical cavity surface emitting lasers (VCSELs) has produced devices with record low threshold currents and voltages and with wall-plug efficiencies greater than 50%. Wet oxidation of buried AlGaAs layers has been employed to reduce the problems associated with substrate current leakage in GaAs-on-insulator (GOL) MESFETs. Wet oxidation has also been considered as a route to the long-sought goal of a III-V MIS technology. To continue improving device designs for even higher performance and to establish a truly manufacturable technology based on wet oxidation, the effect of oxidation of a given layer on the properties of the entire device structure must be understood. The oxidation of a given layer can strongly affect the electrical and chemical properties of adjacent layers. Many of these effects are derived from the production of large amounts of elemental As during the oxidation reaction, the resultant generation of point defects, and the diffusion of these defects into adjacent regions. This can modify the chemical and electrical properties of these regions in ways that can impact device design, fabrication, and performance. Current understanding of the problem is discussed here

In this study, we develop a novel approach to determine the surface Fermi level and the surface state densities of semiconductors. The built-in electric field and thus the surface barrier height are evaluated from the Franz-Keldysh oscillations in the PR spectra. Based on the thermionic-emission theory and current-transport theory, the surface state density as well as the pinning position of the surface Fermi level can be determined from the dependence of the surface barrier height on the pump beam intensity. Even though this method is significantly simpler, easier to perform, and time efficient compared with other approaches, the results obtained agree with the literature.

In this article, we review the recent progress on GaAs MOSFET's using in-situ MBE-grown Ga2O3(Gd2O3) as the gate dielectric. Both depletion-mode (D-mode) and inversion-mode (I-mode) GaAs MOSFET's with negligible drain current drift and hysteresis are demostrated. The absence of drain current drift and hysteresis indicates that the excellent stability of the oxide and low oxide/GaAs interface state density have been achieved. The drain current density and transconductance are about one order of magnitude higher than the best previous reported data in the literature for an inversion-mode GaAs MOSFET. Excellent high frequency and power performances were also measured from the depletion-mode devices. These improvements are attributed to the excellent Ga2O3(Ga2O3) oxide properties and novel processing techniques.

In this study we report different surface treatments and device designs that can be used to improve the performance of InGaAs/InP heterostructure devices. The surface properties of InGaAs (100) after sulfur or UV-ozone passivation were investigated by photoluminescence and high energy-resolution X-ray photoelectron spectroscopy. The base leakage current and the dc current gain of InGaAs/InP heterostructure bipolar transistors (HBTs) have been used to evaluate the efficiency of the passivation treatments. Although these treatments successfully passivated large area HBTs, the improved device characteristics degraded after a dielectric was deposited by plasma enhanced chemical vapor deposition (PECVD) or even just with time. Nevertheless, we found a combined surface treatment that is successful even under PECVD deposition – a UV-ozone treatment that produces a sacrificial oxide that is then removed by HF. This approach will be contrasted with a different method based on an optimized HBT layer structure with a thin InP emitter. In this case, the thin layer of depleted InP from the emitter left on the extrinsic base passivates the surface, and no treatment is required.

The surface passivation of GaAs power FET has been investigated. Intermodulation distortion of GaAs power FET was found to be affected by frequency dispersion which originates from electron trap at the surface in the vicinity of the gate. There are two ways to suppress the frequency dispersion. One is reducing electron trap itself by using surface passivation, the other is making surface insensitive to the surface trapping effect. We found the FET with undoped InGaP layers on the n-GaAs channel is free from surface trapping effects. The undoped InGaP layer acts as an ideal passivation layer for the channel, since it shows only 2% frequency dispersion of drain current at 1MHz compared to DC condition.

Reproducible fabrication of high performance metal oxide semiconductor field effect transistors (MOSFETs) from compound semiconductors will require both good interfacial electrical characteristics and good thermal stability. While dielectrics such as SiO2, AIN, and GdGaOx have demonstrated low to moderate interface state densities, questions remain about their thermal stability and reliability, particularly for use in high power or high temperature widebandgap devices. In this paper we will compare the utility of two potential gate dielectric materials: GdOx and GaOx. GdOx has been found to produce layers with excellent surface morphologies as evidenced by surface roughness of less than I nm. Stoichiometric films can be easily obtained over a range of deposition conditions, though deposition temperatures of 500°C appear to offer the optimum interfacial electrical quality. By contrast GaOx films are quite rough, polycrystalline and show poor thermal stability. Further they exhibit a range of stoichiometries depending upon deposition temperature, Ga flux and oxygen flux. This paper will describe the relationship between deposition conditions and film characteristics for both materials, and will present electrical characterization of capacitors fabricated from GdOx on Si.

Silicon nitride was deposited in-situ by electron-cyclotron resonance plasma chemical-vapour deposition (ECR-CVD) on (110) surfaces formed by cleaving GaAs and InP(100) substrates in an ultra-high vacuum processing system. Capacitors formed by depositing Al gates on the facet surfaces were analyzed by the high-low frequency capacitance-voltage (CV) technique. The minimum interface-state densities obtained for the cleaved GaAs (110) surfaces were 1–2 × 1012 eV−1cm−2. For cleaved InP facets the measured minimum interface state densities were a factor of two higher; however, they exhibited a smaller hysteresis in the CV characteristics and a smaller modulation in the surface potential. The interface state densities did not change significantly for the GaAs(110) facets if a Si interface control layer 0.8–2 nm thick was deposited prior to silicon nitride deposition; however, a larger effect was observed for the hysteresis and flatband voltage shift of the CV characteristics. The effect of annealing on the interfaces with Si was investigated and the performance compared with published results for GaAs(100) surfaces prepared by molecular-beam epitaxy.

We have studied the thermal stability and etching characteristics of E-beam deposited SiO and SiO2. Dry etch rates were studied using SF6 and NF3 discharges in a Plasma Therm inductively coupled plasma system. Wet etch rates were assessed with buffered HF and HF/H2O solutions. SiO2 etched faster than SiO under all etch conditions. Dry etch rate of SiO2 was comparable with PECVD SiO2. Auger analysis indicated that SiO2 maintained excellent thermal stability after annealing to 700°C. The Si/O ratio of SiO in the film increased when annealed to 700°C. Ellipsometry also revealed greater refractive index variance across the sample for SiO, as compared to SiO2. However, thickness variation of both films was ≤ 2% across the wafer. Ellipsometry data also showed great thermal stability of SiO and SiO2. There was <4% change after 700°C annealing.

Electrochemical sulfidation of n-type GaAs (100) has been investigated under anodic conditions with a view to surface passivation for improved electronic and optical properties. This treatment has successfully removed the native oxide and formed a thick layer of gallium and arsenic sulfides displaying high durability against oxidation and optical degradation compared to conventional dipping treatment using (NH4)2S solution. X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), secondary ion mass spectroscopy (SIMS) and atomic force microscopy (AFM) have been used to characterize the treated surfaces. These studies have been used to devise a structural model of the near-surface region. The results of Raman backscattering spectroscopy measurements indicate that there is a 35% reduction of the surface barrier height compared to the untreated surface. This passivation technique has been shown to be effective in reducing surface band bending on GaAs (100) and enhancing the chemical stability of the surface, making it more suitable for electronic and optoelectronic device applications.

Anisotropic, smooth etching of the group-Ill nitrides has been reported at relatively high rates in high-density plasma etch systems. However, such etch results are often obtained under high dc-bias and/or high plasma flux conditions where plasma induced damage can be significant. Despite the fact that the group-III nitrides have higher bonding energies than more conventional III–V compounds, plasma-induced etch damage is still a concern. Attempts to minimize such damage by reducing the ion energy or increasing the chemical activity in the plasma often result in a loss of etch rate or anisotropy which significantly limits critical dimensions and reduces the utility of the process for device applications requiring vertical etch profiles. It is therefore necessary to develop plasma etch processes which couple anisotropy for critical dimension and sidewall profile control and high etch rates with low-damage for optimum device performance. In this study we report changes in sheet resistance and contact resistance for n- and p-type GaN samples exposed to an Ar inductively coupled plasma (ICP). In general, plasma-induced damage was more sensitive to ion bombardment energies as compared to plasma flux. In addition, p-GaN was typically more sensitive to plasma-induced damage as compared to n-GaN.

Selective etching of InN over GaN and AlN, and of GaAs over both AlGaAs and InGaP was examined with a number of different plasma chemistries under inductively coupled plasma conditions. Selectivities up to 55 for InN/GaN and 20 for InN/AlN were achieved in IC1/Ar discharges. For GaAs/AlGaAs, maximum selectivities of 75(with BCl3/SF6) were obtained while for GaAs/InGaP values of 80(with BCl3/SF6) and 25(with BCl3/NF3) were achieved. Selective etching of InGaP over GaAs is possible with either CH4/H2 or BI3. The selectivity is a strong function of ion flux and ion energy, and can result from two factors – either formation of a nonvolatile etch product, or a difference in bond strength between the two materials.

The interactions of atomic hydrogen, deuterium and sulfur with (100) GaAs surfaces have been studied. The atoms were produced in a remote microwave plasma and their effect on carrier recombination velocities was continuously monitored in situ by the change in photoluminescence intensity (PLI). It was observed that the PLI increased by about 1–2 orders of magnitude following a few seconds exposure to hydrogen and deuterium atoms. A subsequent treatment with sulfur atoms further increased the PLI. A kinetic analysis of the room temperature hydrogen atom interactions with the (100) GaAs surface was attempted. A similar behavior was observed at higher temperatures when hydrogen and deuterium atoms were allowed to interact with a SiSiO2 interface. A comparison of the two systems leads us to conclude that the hydrogen and deuterium atoms can be trapped at interstitial sites near these interfaces. The kinetics of the hydrogen atom loss from these semiconductors is presented and analyzed in terms of a distribution of trapping sites.